272
ATmega64A [DATASHEET]
8160D–AVR–02/2013
Note:
1. Z0: should be zero for all SPM commands, byte select for the LPM instruction.
Self-programming.
27.9
Register Description
27.9.1
SPMCSR – Store Program Memory Control Register
The Store Program Memory Control Register contains the control bits needed to control the Boot Loader
operations.
Bit 7 – SPMIE: SPM Interrupt Enable
When the SPMIE bit is written to one, and the I-bit in the Status Register is set (one), the SPM ready interrupt will
be enabled. The SPM ready interrupt will be executed as long as the SPMEN bit in the SPMCSR Register is
cleared.
Bit 6 – RWWSB: Read-While-Write Section Busy
When a Self-programming (Page Erase or Page Write) operation to the RWW section is initiated, the RWWSB will
be set (one) by hardware. When the RWWSB bit is set, the RWW section cannot be accessed. The RWWSB bit
will be cleared if the RWWSRE bit is written to one after a Self-programming operation is completed. Alternatively
the RWWSB bit will automatically be cleared if a page load operation is initiated.
Bit 5 – Res: Reserved Bit
This bit is a reserved bit in the ATmega64A and always read as zero.
Table 27-8.
Explanation of Different Variables Used in
Figure 27-3 and the Mapping to the Z-pointe
r(1)(2)Variable
Corresponding
Z-value
Description
PCMSB
14
Most significant bit in the Program Counter. (The
Program Counter is 15 bits PC[14:0]).
PAGEMSB
6
Most significant bit which is used to address the
words within one page (128 words in a page
requires seven bits PC [6:0]).
ZPCMSB
Z15
Bit in Z-register that is mapped to PCMSB. Because
Z0 is not used, the ZPCMSB equals PCMSB + 1.
ZPAGEMSB
Z7
Bit in Z-register that is mapped to PAGEMSB.
Because Z0 is not used, the ZPAGEMSB equals
PAGEMSB + 1.
PCPAGE
PC[14:7]
Z15:Z8
Program Counter page address: Page select, for
Page Erase and Page Write
PCWORD
PC[6:0]
Z7:Z1
Program Counter word address: Word select, for
filling temporary buffer (must be zero during Page
Write operation)
Bit
765
4
3
2
1
0
SPMIE
RWWSB
–
RWWSRE
BLBSET
PGWRT
PGERS
SPMEN
SPMCSR
Read/Write
R/W
R
R/W
Initial Value
0