參數(shù)資料
型號(hào)： MH28D72KLG-10
廠商： Mitsubishi Electric Corporation
英文描述： 9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
中文描述： 9663676416位（134217728 - Word的72位），雙數(shù)據(jù)速率同步DRAM模塊
文件頁(yè)數(shù)： 36/39頁(yè)
文件大?。?/td> 337K
代理商： MH28D72KLG-10
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
MH28D72KLG-75,-10
9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MIT-DS-0412-0.1
21.Mar.2001
Preliminary Spec.
Some contents are subject to change without notice.
36
Serial Presence Detect Table II
31
Density of each bank on module
512MByte
80
36-61
Superset Information (may be used in future)
option
00
62
SPD Revision
63
Checksum for bytes 0-62
Check sum for -10
64-71
Manufactures Jedec ID code per JEP-108E
MITSUBISHI
1CFFFFFFFFFFFFFF
72
Manufacturing location
Manufacture location
XX
73-90
Manufactures Part Number
91-92
Revision Code
PCB revision
rrrr
93-94
Manufacturing date
year/week code
yyww
95-98
Assembly Serial Number
Reserved
serial number
ssssssss
99-127
128-255
Undefined
Undefined
00
00
32
Command and Address signal input setup time
33
Command and Address signal input hold time
34
Data signal input setup time
35
Data signal input hold time
0
00
Check sum for -75
MH64D72KLG-75
MH64D72KLG-10
4D4832384437324B4C472D37352020202020
4D4832384437324B4C472D31302020202020
-75
-10
-75
-10
-75
-10
-75
-10
0.9nS
1.1nS
0.9nS
1.1nS
0.5nS
0.6nS
0.5nS
0.6nS
Open for Customer Use
90
B0
90
B0
50
60
50
60
11
97
相關(guān)PDF資料
PDF描述
MH28D72KLG-75 9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MH28S72PJG-5 Circular Connector; Body Material:Aluminum Alloy; Series:KPSE07; No. of Contacts:19; Connector Shell Size:14; Connecting Termination:Crimp; Circular Shell Style:Jam Nut Receptacle; Circular Contact Gender:Pin RoHS Compliant: No
MH28S72PJG-6 Circular Connector; Body Material:Aluminum Alloy; Series:KPSE07; No. of Contacts:19; Connector Shell Size:14; Connecting Termination:Crimp; Circular Shell Style:Jam Nut Receptacle; Circular Contact Gender:Socket RoHS Compliant: No
MH28S72PJG-7 KPSE 19C 19#20 SKT RECP
MH2M365CXJ-5 HYPER PAGE MODE 75497472-BIT ( 2097152-WORD BY 36-BIT ) DYNAMIC RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MH28D72KLG-75 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MH28FAD 制造商:MTRONPTI 制造商全稱(chēng):MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator
MH28FAD-R 制造商:MTRONPTI 制造商全稱(chēng):MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator
MH28FAD-R-1.96608MHZ 制造商:MtronPTI 功能描述:
MH28FAD-R-32.000MHZ 制造商:MtronPTI 功能描述:
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