參數資料
型號: ML60851D
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: USB Device Controller
中文描述: USB設備控制器
文件頁數: 58/82頁
文件大?。?/td> 705K
代理商: ML60851D
ML60851D
Semiconductor
58/82
PEDL60851D-01
DMA Transfer Timing (7)
Memory to ML60851D (Demand Transfer, Single Address Mode)
Parameter
Symbol
t
1
t
2
t
3
Condition
Load 20 pF
FIFO WRITE
Note
DREQ
Disable Time
FIFO Access Time
DACK Hold Time
Write Data Setup Time
Write Data Hold Time
t
4
t
5
Unit
ns
ns
ns
ns
ns
ns
ns
Max.
20
Min.
42
0
30
2
63
105
Recovery Time
t
6
8-bit DMA
16-bit DMA
1
2
3
Notes: 1. When in Single Address mode, A7:A0 and
CS
are ignored.
t
2
is defined depending on DACK or
WR
which becomes active last.
2. 3-clock time of oscillation clock (clock period: 21 ns).
3. 5-clock time of oscillation clock (clock period: 21 ns).
t
1
t
3
Last Packet Write
t
4
t
2
DREQ
DACK
WR
DIN
t
5
t
6
(Note)
(Note) The last Write to reach the byte size (maximum packet size) specified by the EP1 Payload
Register.
To terminate DMA transfer before reaching the maximum packet size, set EP1 Packet Ready
by writing "1" to the EP1 Endpoint Packet Ready bit.
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