
PEDL9352-01
OKI Semiconductor
ML9352
3/53
PIN DESCRIPTION
Function
Pin name
Number
of pins
l/O
Description
D0 to D7
8
l/O
This is an 8-bit bi-directional data bus that can be connected to an
8-bit or 16-bit standard MPU data bus. When a serial interface is
selected (
P
/S = “H”):
D7: Serial data input pin (SI)
D6: Serial clock input pin (SCL)
In this case, D0 to D5 will be in the Hi-Z state. D0 to D7 will all be in
the Hi-Z state when the chip select is in the inactive state.
Normally, the lowest bit of the MPU address bus is connected.
Set this pin to “H” when writing or reading display data, and set to
“L” when entering any other control command or writing any other
control data.
Initial setting is made by making
RES
= “L”. The reset operation is
made during the active level of the RES signal.
These are the chip select signals. The Chip Select of the LSI
becomes active when
CS1
is “L” and also CS2 is “H” and allows
the input/output of data or commands.
The active level of this signal is “L” when connected to an
80-series MPU.
This terminal is connected to the
RD
signal of the 80-series MPU,
and the data bus of the ML9352 goes into the output state when
this signal is “L”.
The active level of this signal is “H” when connected to a 68-series
MPU.
This pin will be the Enable clock input pin when connected to a
68-series MPU.
The active level of this signal is “L” when connected to an
80-series MPU.
This terminal is connected to the
WR
signal of the 80-series MPU.
The data on the data bus is latched into the ML9352 at the rising
edge of the
WR
signal.
When connected to a 68-series MPU, this pin becomes the input
pin for the Read/Write control signal.
R/
W
= “H”: Read, R/
W
= “L”: Write
This is the pin for selecting the MPU interface type. (This pin has a
pull-down resistor.)
C86 = “H”: 68-Series MPU interface
C86 = “L”: 80-Series MPU interface
A0
1
I
RES
1
I
CS1
CS2
2
I
RD
(E)
1
I
WR
(R/
W
)
1
I
MPU
Interface
C86
1
I