參數(shù)資料
型號: ML9352
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: 128-Channel Organic EL Driver with Built-in RAM
中文描述: 128通道有機EL帶內(nèi)置驅(qū)動器在RAM
文件頁數(shù): 31/53頁
文件大?。?/td> 302K
代理商: ML9352
PEDL9352-01
OKI Semiconductor
ML9352
31/53
Reverse voltage pulse width adjustment set mode (Write)
The reverse voltage pulse width adjustment register set command is enabled by setting this command. When the
reverse voltage pulse width adjustment set mode is set, commands other than the reverse voltage pulse width
adjustment register set command cannot be used. This state is released by setting reverse voltage pulse width
adjustment data to the register.
A0
D7
D6
D5
D4
0
1
0
0
0
Reverse voltage pulse width adjustment register set (Write)
The pulse width for the reverse voltage applying duration (applying reverse voltage makes all anode outputs low
and all cathode outputs high) is set between 0/256 and 16/256 by setting 4-bit data to the reverse voltage pulse
width adjustment register using this command.
When the reverse voltage pulse width adjustment register is set by inputting this command, the reverse voltage
pulse width adjustment set mode is released.
Reverse voltage pulse
width
16/256
0
*
*
14/256
0
*
*
12/256
0
*
*
10/256
0
*
*
8/256
0
*
*
6/256
0
*
*
4/256
0
*
*
2/256
0
*
*
0/256
0
*
*
Applied reverse voltage setting (Write)
Selects whether to apply the reverse voltage during the discharge interval.
Valid only when, in the cathode drive set 1, the cathode output status during the discharge interval has been set to
low.
Cathode output state
A0
D7
D6
Applied reverse voltage
setting off
Applied reverse voltage
setting on
Switching of anode output current adjusting external resistor (Write)
This command selects connection pin R
EL1
or R
EL2
of the external resistor for adjusting anode output current.
Select pin
A0
D7
D6
R
EL1
0
1
0
R
EL2
0
1
0
D3
0
D2
0
D1
1
D0
0
A0
D7
D6
D5
D4
D3
D2
D1
D0
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
0
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
D5
D4
D3
D2
D1
D0
0
1
0
0
0
0
1
0
0
0
1
0
0
0
0
1
0
1
D5
0
0
D4
0
0
D3
1
1
D2
0
0
D1
1
1
D0
0
1
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