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參數(shù)資料
| 型號： | MPC603RZT266TX |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 266 MHz, RISC PROCESSOR, PBGA255 |
| 封裝： | 23 X 23 MM, 2.60 MM HEIGHT, 1.27 MM PITCH, PLASTIC, BGA-255 |
| 文件頁數(shù)： | 34/36頁 |
| 文件大?。?/td> | 440K |
| 代理商： | MPC603RZT266TX |
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PID7t-603e Hardware Specifications
7
Electrical and Thermal Characteristics
Table 6 provides the power consumption for the PID7t-603e.
1.4.2 AC Electrical Characteristics
This section provides the AC electrical characteristics for the PID7t-603e. These specications are for 200,
266 and 300 MHz processor speed grades. The processor core frequency is determined by the bus
(SYSCLK) frequency and the settings of the PLL_CFG[03] signals. All timings are specied respective to
the rising edge of SYSCLK. PLL_CFG signals should be set prior to power up and not altered afterwards.
Table 6. Power Consumption
Processor (CPU) Frequency
Unit
100
MHz
133
MHz
166
MHz
200
MHz
233
MHz
266
MHz
300
MHz
Full-On Mode (DPM Enabled)
Typical
1.1
1.6
2.1
2.5
3.0
3.5
4.0
W
Maximum
1.6
2.4
3.2
4.0
4.6
5.3
6.0
W
Doze Mode
Typical
0.55
.7
.9
1.1
1.3
1.5
1.8
W
Nap Mode
Typical
50
60
75
85
100
120
130
mW
Sleep Mode
Typical
45
50
55
65
75
90
100
mW
Sleep ModePLL Disabled
Typical
40
mW
Sleep ModePLL and SYSCLK Disabled
Typical
15
mW
Maximum
25
80
100
mW
Notes:
1. These values apply for all valid PLL_CFG[0–3] settings and do not include output driver power (OVdd) or
analog supply power (AVdd). OVdd power is system dependent but is typically
10% of Vdd. Worst-case
AVdd = 15 mW.
2. Typical power is an average value measured at Vdd = AVdd = 2.5 V, OVdd = 3.3V, in a system executing
typical applications and benchmark sequences.
3. Maximum power is measured at 2.625 V using a worst-case instruction mix.
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