參數(shù)資料
型號： MPC8377E-RDBA
廠商： Freescale Semiconductor
文件頁數(shù)： 37/127頁
文件大?。?/td> 0K
描述： BOARD REF DES MPC8377 REV 2.1
設(shè)計資源： MPC8379E-RDB Ref Design Guide
標(biāo)準(zhǔn)包裝： 1
系列： PowerQUICC II™ PRO
類型： MPU
適用于相關(guān)產(chǎn)品： MPC8377E
所含物品： 板，CD
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MPC8379EVRALG-ND - MPU PWRQUICC II 667MHZ 689TEPBGA
MPC8379EVRAJF-ND - MPU PWRQUICC II 533MHZ 689TEPBGA
MPC8379EVRAGD-ND - MPU PWRQUICC II 400MHZ 689TEPBGA
MPC8377EVRALG-ND - MPU PWRQUICC II 667MHZ 689TEPBGA
MPC8377EVRAJF-ND - MPU PWRQUICC II 533MHZ 689TEPBGA
更多...
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
Freescale Semiconductor
17
6.1
DDR1 and DDR2 SDRAM DC Electrical Characteristics
This table provides the recommended operating conditions for the DDR2 SDRAM component(s) of the
device when GVDD(typ) = 1.8 V.
Table 14 provides the DDR2 capacitance when GVDD(typ) = 1.8 V.
This table provides the recommended operating conditions for the DDR SDRAM component(s) when
GVDD(typ) = 2.5 V.
Table 13. DDR2 SDRAM DC Electrical Characteristics for GVDD(typ) = 1.8 V
Parameter
Symbol
Min
Max
Unit
Note
I/O supply voltage
GVDD
1.71
1.89
V
I/O reference voltage
MVREF
0.49
× GVDD
0.51
× GVDD
V2, 5
I/O termination voltage
VTT
MVREF –0.04
MVREF +0.04
V
Input high voltage
VIH
MVREF + 0.140
GVDD +0.3
V
—
Input low voltage
VIL
–0.3
MVREF – 0.140
V
—
Output leakage current
IOZ
–50
50
μA4
Output high current (VOUT =1.40V)
IOH
–13.4
—
mA
—
Output low current (VOUT =0.3 V)
IOL
13.4
—
mA
—
Notes:
1. GVDD is expected to be within 50 mV of the DRAM GVDD at all times.
2. MVREF is expected to be equal to 0.5 × GVDD, and to track GVDD DC variations as measured at the receiver. Peak-to-peak
noise on MVREF may not exceed ±2% of the DC value.
3. VTT is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
equal to MVREF. This rail should track variations in the DC level of MVREF.
4. Output leakage is measured with all outputs disabled, 0 V
≤ V
OUT ≤ GVDD.
5. See AN3665, “MPC837xE Design Checklist,” for proper DDR termination.
Table 14. DDR2 SDRAM Capacitance for GVDD(typ) = 1.8 V
Parameter
Symbol
Min
Max
Unit
Note
Input/output capacitance: DQ, DQS, DQS
CIO
68
pF
Delta input/output capacitance: DQ, DQS, DQS
CDIO
—0.5
pF
Note:
1. This parameter is sampled. GVDD = 1.8 V ± 0.090 V, f = 1 MHz, TA = 25°C, VOUT = GVDD/2, VOUT (peak-to-peak) = 0.2 V.
Table 15. DDR SDRAM DC Electrical Characteristics for GVDD (typ) = 2.5 V
Parameter
Symbol
Min
Max
Unit
Note
I/O supply voltage
GVDD
2.375
2.625
V
I/O reference voltage
MVREF
0.49
× GVDD
0.51
× GVDD
I/O termination voltage
VTT
MVREF – 0.04
MVREF + 0.04
V
Input high voltage
VIH
MVREF + 0.18
GVDD + 0.3
V
—
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8377E-RDBA 制造商:Freescale Semiconductor 功能描述:MPC837x Family Reference Desig
MPC8377EVRAFDA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8377EVRAFFA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8377EVRAFGA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8377EVRAGD 功能描述:微處理器 - MPU PBGA W/ ENCR RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
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