- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄18711 > MPC8377EWLANB (Freescale Semiconductor)ACCESS POINT/ROUTER MPC8377 PDF資料下載
參數(shù)資料
| 型號(hào)： | MPC8377EWLANB |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 11/127頁 |
| 文件大?。?/td> | 0K |
| 描述： | ACCESS POINT/ROUTER MPC8377 |
| 標(biāo)準(zhǔn)包裝： | 1 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當(dāng)前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
108
Freescale Semiconductor
As shown in Figure 64, the primary clock input (frequency) is multiplied up by the system phase-locked
loop (PLL) and the clock unit to create the coherent system bus clock (csb_clk), the internal clock for the
DDR controller (ddr_clk), and the internal clock for the local bus interface unit (lbiu_clk).
The csb_clk frequency is derived from a complex set of factors that can be simplified into the following
equation:
csb_clk = {PCI_SYNC_IN × (1 + CFG_CLKIN_DIV)} × SPMF
Eqn. 20
In PCI host mode, PCI_SYNC_IN × (1 + CFG_CLKIN_DIV) is the CLKIN frequency.
The csb_clk serves as the clock input to the e300 core. A second PLL inside the e300 core multiplies up
the csb_clk frequency to create the internal clock for the e300 core (core_clk). The system and core PLL
multipliers are selected by the SPMF and COREPLL fields in the reset configuration word low register
(RCWLR) which is loaded at power-on reset or by one of the hard-coded reset options. See Chapter 4,
“Reset, Clocking, and Initialization,” in the MPC8379E Reference Manual for more information on the
clock subsystem.
The internal ddr_clk frequency is determined by the following equation:
ddr_clk = csb_clk × (1 + RCWLR[DDRCM])
Eqn. 21
Note that ddr_clk is not the external memory bus frequency; ddr_clk passes through the DDR clock divider
(
÷2) to create the differential DDR memory bus clock outputs (MCK and MCK). However, the data rate
is the same frequency as ddr_clk.
The internal lbiu_clk frequency is determined by the following equation:
lbiu_clk = csb_clk × (1 + RCWLR[LBCM])
Eqn. 22
Note that lbiu_clk is not the external local bus frequency; lbiu_clk passes through the LBIU clock divider
to create the external local bus clock outputs (LCLK[0:2]). The eLBC clock divider ratio is controlled by
LCRR[CLKDIV].
Some of the internal units may be required to be shut off or operate at lower frequency than the csb_clk
frequency. Those units have a default clock ratio that can be configured by a memory mapped register after
the device comes out of reset. Table 73 specifies which units have a configurable clock frequency.
Table 73. Configurable Clock Units
Unit
Default Frequency
Options
eTSEC1, eTSEC2
csb_clk/3
Off,
csb_clk, csb_clk/2, csb_clk/3
eSDHC and I2C11
csb_clk/3
Off,
csb_clk, csb_clk/2, csb_clk/3
Security block
csb_clk/3
Off,
csb_clk, csb_clk/2, csb_clk/3
USB DR
csb_clk/3
Off,
csb_clk, csb_clk/2, csb_clk/3
PCI and DMA complex
csb_clk
Off,
csb_clk
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 0622022010 | TOOL INSERTION 40POS 4ROWS |
| MPC8377EWLANA | ACCESS POINT/ROUTER MPC8377 |
| 76250ENC | XFRMR MAX250 EN60950 APPROVED |
| DR-TRC105-434-EV | BOARD EVALUATION 434MHZ RFM RFIC |
| DR-TRC105-403-EV | BOARD EVALUATION 403MHZ RFM RFIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8377EZQAFDA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8377EZQAFFA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8377EZQAFGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8377EZQAGDA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8377EZQAGFA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。