
Introduction
ARM DDI 0165B
Copyright 2000 ARM Limited. All rights reserved.
1-5
1.2
ARM9E-S architecture
The ARM9E-S processor has two instruction sets:
the 32-bit ARM instruction set used in ARM state
the 16-bit Thumb instruction set used in Thumb state.
The ARM9E-S is an implementation of the ARMv5TE architecture. For details of both
the ARM and Thumb instruction sets, refer to the ARM Architecture Reference Manual.
For full details of the ARM9E-S instruction set, contact ARM at www.arm.com.
1.2.1
Instruction compression
A typical 32-bit architecture can manipulate 32-bit integers with single instructions, and
address a large address space much more efficiently than a 16-bit architecture. When
processing 32-bit data, a 16-bit architecture takes at least two instructions to perform
the same task as a single 32-bit instruction.
When a 16-bit architecture has only 16-bit instructions, and a 32-bit architecture has
only 32-bit instructions, overall the 16-bit architecture has higher code density, and
greater than half the performance of the 32-bit architecture.
Thumb implements a 16-bit instruction set on a 32-bit architecture, giving higher
performance than on a 16-bit architecture, with higher code density than a 32-bit
architecture.
The ARM9E-S gives you the choice of running in ARM state, or Thumb state, or a mix
of the two. This allows you to optimize both code density and performance to best suit
your application requirements.
1.2.2
The Thumb instruction set
The Thumb instruction set is a subset of the most commonly used 32-bit ARM
instructions. Thumb instructions are each 16 bits long, and have a corresponding 32-bit
ARM instruction that has the same effect on the processor model. Thumb instructions
operate with the standard ARM register configuration, allowing excellent
interoperability between ARM and Thumb states.
Thumb has all the advantages of a 32-bit core:
32-bit address space
32-bit registers
32-bit shifter and Arithmetic Logic Unit (ALU)
32-bit memory transfer.