參數(shù)資料
型號(hào)： MQ80C32-20/883R
廠商： TEMIC SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 20 MHz, MICROCONTROLLER, CQFP44
文件頁(yè)數(shù)： 181/290頁(yè)
文件大?。?/td> 4178K
代理商： MQ80C32-20/883R
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Debug in depth
ARM DDI 0165B
Copyright 2000 ARM Limited. All rights reserved.
C-21
C.7.3
Exit from debug state
Leaving debug state involves:
restoring the internal state of the ARM9E-S
causing a branch to the next instruction to be executed
synchronizing back to CLK conditioned with CLKEN.
After restoring the internal state, a branch instruction must be loaded into the pipeline.
calculating the branch.
The SYSSPEED bit of scan chain 1 forces the ARM9E-S to resynchronize back to CLK
conditioned with CLKEN. The penultimate instruction in the debug sequence is a
branch to the instruction at which execution is to resume. This is scanned in with bit 32
(SYSSPEED) set LOW. The final instruction to be scanned in is a NOP (such as MOV
R0, R0
), with bit 32 set HIGH. The core is then clocked to load this instruction into the
pipeline.
Next, the RESTART instruction is selected in the TAP controller. When the state
machine enters the RUN-TEST/IDLE state, the scan chain reverts back to System
mode, and clock resynchronization to CLK conditioned with CLKEN occurs within
the ARM9E-S. Normal operation then resumes, with instructions being fetched from
memory.
The delay, waiting until the state machine is in RUN-TEST/IDLE state, allows
conditions to be set up in other devices in a multiprocessor system without taking
immediate effect. Then, when RUN-TEST/IDLE state is entered, all the processors
resume operation simultaneously.
The function of DBGACK is to tell the rest of the system when the ARM9E-S is in
debug state. You can use this signal to inhibit peripherals such as watchdog timers that
have real-time characteristics. Also, you can use DBGACK to mask out memory
accesses that are caused by the debugging process. For example, when the ARM9E-S
enters debug state after a breakpoint, the instruction pipeline contains the breakpointed
instruction plus two other instructions that have been prefetched. On entry to debug
state, the pipeline is flushed. So, on exit from debug state, the pipeline must be refilled
to its previous state. Therefore, because of the debugging process, more memory
accesses occur than are normally expected. It is possible, using the DBGACK signal
and a small amount of external logic, for a peripheral which is sensitive to the number
of memory accesses to return the same result with and without debugging.
Note
You can only use DBGACK in such a way using breakpoints. It does not mask the
correct number of memory accesses after a watchpoint.
相關(guān)PDF資料
PDF描述
MQ80C52EXXX-25SBR 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQFP44
MD83C154DTXXX-12P883D 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CDIP40
MR83C154DTXXX-20/883 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44
MD83C154CXXX-25/883 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40
MD80C52CXXX-12SCD 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CDIP40
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MQ82370-20 制造商:Rochester Electronics LLC 功能描述:- Bulk
MQ8238020 制造商:Intel 功能描述:CONTROLLER: OTHER
MQ82380-20 制造商:Rochester Electronics LLC 功能描述:- Bulk
MQ82380-20/R 制造商:Rochester Electronics LLC 功能描述:
MQ82592 制造商:Rochester Electronics LLC 功能描述:- Bulk
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