
Debug in depth
C-18
Copyright 2000 ARM Limited. All rights reserved.
ARM DDI 0165B
C.7
Determining the core and system state
When the ARM9E-S is in debug state, you can examine the core and system state by
forcing the load and store multiples into the instruction pipeline.
Before examining the core and system state, the debugger must determine whether the
processor entered debug from Thumb state or ARM state by examining bit 4 of the
EmbeddedICE-RT debug status register. When bit 4 is HIGH, the core has entered
debug from Thumb state. When bit 4 is LOW the core has entered debug from ARM
state.
C.7.1
Determining the core state
When the processor has entered debug state from Thumb state, the simplest method is
for the debugger to force the core back into ARM state. The debugger can then execute
the same sequence of instructions to determine the processor state.
To force the processor into ARM state, execute the following sequence of Thumb
instructions on the core (with the SYSSPEED bit set LOW):
STR R0, [R1]; Save R0 before use
MOV R0, PC
; Copy PC into R0
STR R0, [R1]; Now save the PC in R0
BX
PC
; Jump into ARM state
MOV R8, R8
; NOP
MOV R8, R8
; NOP
Note
Because all Thumb instructions are only 16 bits long, the simplest method, when
shifting scan chain 1, is to repeat the instruction. For example, the encoding for BX R0
is 0x4700, so when 0x47004700 shifts into scan chain 1, the debugger does not have
to keep track of the half of the bus on which the processor expects to read the data.
to determine the processor state.
With the processor in the ARM state, typically the first instruction to execute is:
STMIA R0, {R0-R15}
This instruction causes the contents of the registers to appear on the data bus. You can
then sample and shift out these values.