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| 型號(hào)： | MSM66Q573-NTB |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 30 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, TQFP-100 |
| 文件頁(yè)數(shù)： | 198/419頁(yè) |
| 文件大小： | 2551K |
| 代理商： | MSM66Q573-NTB |
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12-35
MSM66573 Family User's Manual
Chapter 12 Serial Port Functions
12
The clock pulse from the baud rate generator (timer 4) is divided by 4 to generate the
external output clock. The 3rd pulse of the 1/4 divider (value 2 of the baud rate (1/4) counter
in figure 12-16) becomes the sampling clock for the receive data input pin (RXD1). The 4th
pulse (value 3 of the baud rate (1/4) counter in figure 12-16) becomes the receive shift clock.
In synchronization with the receive shift clock, the reception circuit controls reception of the
receive data.
The falling edge of the receive shift clock immediately after SR1REN (bit 7) of SR1CON is
set to "1" triggers the reception operation to start and the external output clock is output from
the receive clock I/O pin (RXC1). At the next receive shift clock, receive data that was
sampled at the prior sampling clock is shifted into the receive shift register.
At the falling edge of the external output clock, the transmit side transmits data. That data
is shifted into the receive side at the falling edge of the transmit shift clock. Receive data
is sampled only once. Thereafter, data reception continues as specified by SR1CON. After
the last receive shift clock is output, the contents of the receive shift register are transferred
to S1BUF, and a receive complete signal is generated in synchronization with M1S1, the
signal that indicates the beginning of an instruction. At this time, an overrun error will be
generated if the previously received data has not been read (the previously received data
will be overwritten).
Finally, SR1REN of SR1CON is automatically cleared to "0" to complete the reception
series.
[Slave mode]
Figure 12-17 shows the timing diagram of operation during slave mode reception.
In the slave mode, the receive clock is input externally (from the receive clock I/O pin
(RXC1)). This external input clock is detected with the edge of CPU clock to generate the
receive shift clock.
In synchronization with the receive shift clock that has been generated, the reception circuit
controls receiving the receive data.
Reception operation is triggered to begin when SR1REN (bit 7) of SR1CON is set to "1" and
the external input clock is input to the receive clock I/O pin (RXC1).
While the external input clock is at a Low level, the value of the receive data input pin (RXD1)
is sampled. The sampled receive data is shifted into the receive shift register at the next
receive shift clock. Thereafter, data reception continues as specified by SR1CON. After
the last receive data is shifted in, the contents of the receive shift register are transferred
to S1BUF, and a receive complete signal is generated in synchronization with M1S1, the
signal that indicates the beginning of an instruction. At this time, an overrun error will be
generated if the previously received data has not been read (the previously received data
will be overwritten). This completes a one frame reception.
In the slave mode, SR1REN is not automatically cleared to "0" after completing the
reception. If the receive shift clock continues to be input, the receive operation will restart.
[Note]
If a receive error occurs such as causes an external input clock to halt halfway through the
reception, it is possible to clear the S1BUF data by setting bit 7 (SR1REN) of SR1CON to
"0" (SIO1 reception disabled. The reception by an external input clock can be resumed by
setting bit 7 (SR1REN) of SR1CON to "1" (SIO1 reception enabled).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSM66Q573-XXTB | 16-BIT, FLASH, 30 MHz, MICROCONTROLLER, PQFP100 |
| MSM66573-XXTB | 16-BIT, MROM, 30 MHz, MICROCONTROLLER, PQFP100 |
| MSM66573L-XXTB | 16-BIT, MROM, 14 MHz, MICROCONTROLLER, PQFP100 |
| MSM66Q579L-TB | 16-BIT, FLASH, 28 MHz, MICROCONTROLLER, PQFP100 |
| MSM66577L-TB | 16-BIT, MROM, 14 MHz, MICROCONTROLLER, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM66Q573-TB | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:16-Bit Microcontroller |
| MSM66Q577 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:16-Bit Microcontroller |
| MSM66Q577L | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:16-Bit Microcontroller |
| MSM66Q577L-TB | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:16-Bit Microcontroller |
| MSM66Q577LY | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:16-Bit Microcontroller |
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