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參數(shù)資料
| 型號： | MSM80C86A-10RS |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, 10 MHz, MICROPROCESSOR, PDIP40 |
| 封裝： | 0.600 INCH, 2.54 MM PITCH, PLASTIC, DIP-40 |
| 文件頁數(shù)： | 17/38頁 |
| 文件大?。?/td> | 298K |
| 代理商： | MSM80C86A-10RS |
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Semiconductor
MSM80C86A-10RS/GS/JS
EXTERNAL INTERFACE
Reset
CPU Initialization is executed by the RESET pin. The MSM80C86A-10’s RESET High signal is
required for greater than 4 clock cycles.
The Rising edge of RESET terminates present operation immediately. The Falling edge of
RESET triggers an internal reset sequence for approximately 10 clock cycles. After the internal
reset sequence is finished normal operation occurs from absolute location FFFF0H.
Interrupt Operations
Interrupt operation is classified as software or hardware, and hardware interrupt is classified
as non-maskable or maskable.
An interrupt causes a new program location defined on the interrupt pointer table, according
to the interrupt type. Absolute locations 00000H through 003FFH are reserved for the interrupt
pointer table. The interrupt pointer table consists of 256-elements. Each element is 4 bytes in
size and corresponds to an 8-bit type number which is sent from an interrupt request device
during the interrupt acknowledge cycle.
Non-maskable Interrupt (NMI)
The MSM80C86A-10 has a Non-maskable interrupt (NMI) which is of higher priority than the
markable interrupt request (INTR).
The NMI request pulse width needs a minimum of 2 clock cycles. The NMI will be serviced at
the end of the current instruction or between string manipulations.
Maskable Interrupt (INTR)
The MSM80C86A-10 provides another interrupt request (INTR) which can be masked by
software. INTR is level triggered, so it must be held until the interrupt request is acknowledged.
INTR will be serviced at the end of the current instruction or between string manipulations.
Interrupt Acknowledge Sequence
ALE
LOCK
INTA
AD0 - AD15
T1
T2
T3
T4 TI
T1
T2
T3
T4
Type Vector
Float
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSM80C88A-10GS | 8-BIT, 10 MHz, MICROPROCESSOR, PQFP56 |
| MSM80C88A-10RS | 8-BIT, 10 MHz, MICROPROCESSOR, PDIP40 |
| MSM80C88A-10JS | 8-BIT, 10 MHz, MICROPROCESSOR, PQCC44 |
| MSM80C88A-10GS-K | 8-BIT, 10 MHz, MICROPROCESSOR, PQFP56 |
| MSM81C55-5GS-2K | 22 I/O, PIA-GENERAL PURPOSE, PQFP44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM80C88A-10GS | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:8-Bit CMOS MICROPROCESSOR |
| MSM80C88A-10JS | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:8-Bit CMOS MICROPROCESSOR |
| MSM80C88A-10RS | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:8-Bit CMOS MICROPROCESSOR |
| MSM80C88A2JS | 制造商:OKI 功能描述:* |
| MSM8128 | 制造商:MOSAIC 制造商全稱:MOSAIC 功能描述:128K x 8 SRAM |
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