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參數(shù)資料
| 型號： | MSM80C86A-10RS |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, 10 MHz, MICROPROCESSOR, PDIP40 |
| 封裝： | 0.600 INCH, 2.54 MM PITCH, PLASTIC, DIP-40 |
| 文件頁數(shù)： | 8/38頁 |
| 文件大?。?/td> | 298K |
| 代理商： | MSM80C86A-10RS |
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15/37
Semiconductor
MSM80C86A-10RS/GS/JS
PIN DESCRIPTION
AD0 - AD15
ADDRESS DATA BUS: Input/Output
These lines are the multiplexed address and data bus.
These are the address bus at the T1 cycle and the data bus at the T2, T3, TW and T4 cycles.
At the T1 cycle, AD0 low indicates Data Bus Low (D0-D7) Enable. These lines are high
impedance during interrupt acknowledge and hold acknowledge.
A16/S3. A17/S4, A18/S5, A19/S6
ADDRESS/STATUS: Output
These are the four most significant addresses, at the T1 cycle. Accessing I/O port address,
these are low at T1 cycles. These lines are Status lines at T2, T3, TW and T4 cycles. S3 and S4
are encoded as shown.
These lines are high impedance during hold acknowledge.
BHE/S7
BUS HIGH ENABLE/STATUS: Output
This line indicates Data Bus High Enable (BHE) at the T1 cycle. This line is status line at T2,
T3, TW and T4 cycles.
RD
READ: Output
This line indicates that CPU is in the memory or I/O read cycle.
This line is the read strobe signal when CPU read data from memory or I/O device. This line
is active low.
This line is high impedance during hold acknowledge.
READY
READY:Input
This line indicates to the CPU that the addressed memory or I/O device is ready to read or
write.
This line is active high. If the setup and hold time is out of specification, illegal operation will
occur.
INTR
INTERRUPT REQUEST: Input
This line is the level triggered interrupt request signal which is sampled during the last clock
cycle of instruction and string manipulation.
It can be internally masked by software.
This signal is active high and internally synchronized.
1
0
1
Stack
0
Alternate Data
S3
0
1
0
S4
Characteristics
Code or None
Data
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSM80C88A-10GS | 8-BIT, 10 MHz, MICROPROCESSOR, PQFP56 |
| MSM80C88A-10RS | 8-BIT, 10 MHz, MICROPROCESSOR, PDIP40 |
| MSM80C88A-10JS | 8-BIT, 10 MHz, MICROPROCESSOR, PQCC44 |
| MSM80C88A-10GS-K | 8-BIT, 10 MHz, MICROPROCESSOR, PQFP56 |
| MSM81C55-5GS-2K | 22 I/O, PIA-GENERAL PURPOSE, PQFP44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM80C88A-10GS | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:8-Bit CMOS MICROPROCESSOR |
| MSM80C88A-10JS | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:8-Bit CMOS MICROPROCESSOR |
| MSM80C88A-10RS | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:8-Bit CMOS MICROPROCESSOR |
| MSM80C88A2JS | 制造商:OKI 功能描述:* |
| MSM8128 | 制造商:MOSAIC 制造商全稱:MOSAIC 功能描述:128K x 8 SRAM |
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