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參數(shù)資料
| 型號： | MT46V128M4FN-75E:C |
| 元件分類： | DRAM |
| 英文描述： | 128M X 4 DDR DRAM, 0.75 ns, PBGA60 |
| 封裝： | 10 X 12.50 MM, FBGA-60 |
| 文件頁數(shù)： | 14/94頁 |
| 文件大?。?/td> | 4179K |
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09005aef80a1d9e7
Micron Technology, Inc., reserves the right to change products or specifications without notice.
512MBDDRx4x8x16_2.fm - Rev. J 1/06 EN
21
2000–2005 Micron Technology, Inc. All rights reserved.
512Mb: x4, x8, x16 DDR SDRAM
Commands
a text description of each command. Two additional Truth Tables—Table 9 on page 50,
and Table 10 on page 52— appear following “Operations” on page 25 and provide cur-
rent state/next state information.
Notes: 1. DESELECT and NOP are functionally interchangeable.
2. BA0–BA1 provide bank address and A0–A12 provide row address.
3. BA0–BA1 provide bank address; A0–Ai provide column address, (where i = 9 for x16, i = 9,
11 for x8, and i = 9, 11, 12 for x4) A10 HIGH enables the auto precharge feature (non per-
sistent), and A10 LOW disables the auto precharge feature.
4. Applies only to read bursts with auto precharge disabled; this command is undefined (and
should not be used) for read bursts with auto precharge enabled and for write bursts.
5. A10 LOW: BA0-BA1 determine which bank is precharged.
A10 HIGH: all banks are precharged and BA0-BA1 are “Don’t Care.”
6. This command is AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.
7. Internal refresh counter controls row addressing while in self refresh mode, all inputs and
I/Os are “Don’t Care” except for CKE.
8. BA0–BA1 select either the mode register or the extended mode register (BA0 = 0, BA1 = 0
select the mode register; BA0 = 1, BA1 = 0 select extended mode register; other combina-
tions of BA0-BA1 are reserved). A0–A12 provide the op-code to be written to the selected
mode register.
Table 6:
Truth Table – Commands
CKE is HIGH for all commands shown except SELF REFRESH
Name (Function)
CS#
RAS#
CAS#
WE#
Address
Notes
DESELECT (NOP)
H
XXX
X
NO OPERATION (NOP)
L
HHH
X
ACTIVE (Select bank and activate row)
L
H
Bank/Row
READ (Select bank and column, and start READ burst)
LH
Bank/Col
WRITE (Select bank and column, and start WRITE burst)
L
H
L
Bank/Col
BURST TERMINATE
LH
H
L
X
PRECHARGE (Deactivate row in bank or banks)
L
H
L
Code
AUTO REFRESH or SELF REFRESH
(Enter self refresh mode)
LLL
H
X
LOAD MODE REGISTER
LLLL
Op-Code
Table 7:
Truth Table – DM Operation
Used to mask write data; provided coincident with the corresponding data
Name (Function)
DM
DQ
Write Enable
L
Valid
Write Inhibit
H
X
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