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參數(shù)資料
| 型號： | MT90221 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Quad IMA/UNI PHY Device(四端口 IMA/UNI 物理層設(shè)備（四端口ATM IMA和UNI處理器）) |
| 中文描述： | 四IMA的/單向物理層設(shè)備（IMA的四端口/單向物理層設(shè)備（四端口自動柜員機(jī)IMA的和單向處理器）） |
| 文件頁數(shù)： | 17/116頁 |
| 文件大?。?/td> | 309K |
| 代理商： | MT90221 |
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MT90221
9
It also provides the content for received ICP cells
that contain some changes. The external T1 or E1
framers provide the low level status of the link. The
software integrates and responds to the various
events.
1.2
The MT90221 circuitry implements the following
functions:
UTOPIA L2 Interface
verification of the incoming HEC (optional)
generation of a new HEC byte
transmit scheduler
generation of the TX IMA Data Cell Rate (IDCR)
generation and insertion of ICP cells, Filler
Cells and Stuff Cells in IMA mode
generation of Idle Cells in UNI mode (from on-
chip copies of the cells)
flexible PCM formatting of the outgoing bytes
retrieval of ATM Cells from the incoming PCM
format
cell delineation
retrieval and processing of ICP cells
synchronization of the IMA Frame
management of the internal re-sequencer RX
links (when active)
extraction of the RX IDCR
verification of the delays between-links
re-sequencing of ATM cells using external
Static RAM
various performance monitoring counters
8-bit microprocessor interface (adaptable to
Intel or Motorola interfaces)
Hardware Functions
The MT90221 can be separated into four major
independent blocks and three support blocks.
The four major independent blocks are:
the ATM Transmit Path
the ATM Receive Path
the PCM Interface
the UTOPIA Interface
The three support blocks are:
the Counter Block
the Interrupt Block
the Microprocessor Interface Block
2.0 The ATM Transmit Path
The transmit path corresponds to a cell flow from the
ATM Layer towards the T1/E1 interface. The ATM cell
path on the transmit side starts at the UTOPIA L2
Interface. Once ATM cells are received at the
UTOPIA port, the device transfers these cells to the
transmit block.
The MT90221 provides ATM cell mapping and
transmission convergence blocks to transport ATM
cell payloads over four flexible PCM Interface ports.
It uses these PCM Interface ports to communicate
with most off-the-shelf T1 or E1 framers.
Each of the four T1/E1 links can be assigned to
either an IMA Group or to an UNI link. A single T1/E1
link cannot be assigned to more than one IMA
Group.
The functional block diagram at Figure 3 illustrates
the transmit function of the MT90221.
2.1
In general terms, the MT90221 transmit input port
has the following properties:
cell level handshaking complies with the ATM
Forum UTOPIA L2 Specification
behaves like a UTOPIA MPHY Device
each port can be enabled or disabled
independently
generates and optionally verifies the HEC for
incoming cells
includes the ATM Forum polynomial when
generating the HEC (default option that can be
disabled)
either passes or removes incoming Idle cells
either passes or removes incoming Unassigned
cells
provides a counter per UTOPIA port for the total
number of Idle and Unassigned cells (24 bits)
provides a counter per UTOPIA port for the total
number of cells with wrong incoming HEC (24
bits)
provides a counter per UTOPIA port for the total
number of cells handled (24 bits)
The input port can be enabled to remove (filter)
Unassigned or Idle cells. If Unassigned or Idle Cell
Filtering is enabled, the device checks for and
discards Unassigned or Idle cells. This function is
programmed in the
UTOPIA Input Control
register.
Cell_In_Control
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90221AL | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quad IMA/UNI PHY Device |
| MT90222 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:4/8/16 Port IMA/TC PHY Device |
| MT90222AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA - Trays |
| MT90222AG2 | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA /BAKE/DRYPACK - Trays |
| MT90223AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 80MBPS 2.5V 384BGA - Trays |
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