參數(shù)資料
型號(hào): MT90221
廠商: Mitel Networks Corporation
英文描述: Quad IMA/UNI PHY Device(四端口 IMA/UNI 物理層設(shè)備(四端口ATM IMA和UNI處理器))
中文描述: 四IMA的/單向物理層設(shè)備(IMA的四端口/單向物理層設(shè)備(四端口自動(dòng)柜員機(jī)IMA的和單向處理器))
文件頁數(shù): 94/116頁
文件大?。?/td> 309K
代理商: MT90221
MT90221
86
Characteristics are over recommended operating conditions unless otherwise stated
Typical figures are at 25
°
C, V
DD
=3.3V, and for design aid only: not guaranteed and not subject to production testing
Figure 26 - Generic PCM Interface Timing Diagram
(Frame Pulse Location)
AC Electrical Characteristics
- Generic PCM Interface Mode
Characteristic
Sym
Min
Typ
Max
Units
Test Conditions
1
TXCK/RXCK Clock period
for T1, 1.544 MHz mode
for E1, 2.048 MHz mode
tcyc
648
488
ns
duty cycle 40 / 60%
2
TXCK/RXCK Clock Width High or
Low
for T1, 1.544 MHz mode
for E1, 2.048 MHz mode
t
4W
260
195
ns
3
Frame Pulse Setup
t
FPS
t
FPH
t
SIS
t
SIH
t
SOD
t
FPD
4
ns
4
Frame Pulse hold
1
ns
5
DSTi 0-3 Serial Input Setup
3
ns
6
DSTi 0-3 Serial Input Hold
0
ns
7
DSTo 0-3 Serial Output Delay
25
ns
CL = 150pF
8
TXSYNC/RXSYNC Frame Pulse
delay after TXCK/RXCK active
border
25
ns
CL = 150pF
9
TXSYNC when input (PCM Mode 5
& 7) is sampled at the end of the bit
period
t
FPSi
25ns
.5
t
cyc
10
TXSYNC when input (PCM Mode 5
& 7) is sampled at the end of the bit
period
t
FPSH
10ns
.5
t
cyc
TXSYNC0-3/
RXSYNC0-3
PCM
Bit Cells
T1 (1.544 Mbps)
Channel 24
LSB Bit
Framing
Bit
Channel 1
MSB Bit
Channel 1
Bit 2
Positive Pulse
Negative Pulse
BIT Transmitted at
Rising Edge
BIT Sampled at
Falling Edge
TXSYNC0-3/
RXSYNC0-3
TXCK0-3/
RXCK0-3
TXCK0-3/
RXCK0-3
BIT Transmitted at
Falling Edge
BIT Sampled at
Rising Edge
PCM
Bit Cells
E1 (2.048 Mbps)
Channel 31
LSB Bit
Channel 0
MSB Bit
Channel 0
Bit 2
Channel 0
Bit 3
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MT90222AG2 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA /BAKE/DRYPACK - Trays
MT90223AG 制造商:Microsemi Corporation 功能描述:ATM IMA 80MBPS 2.5V 384BGA - Trays