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參數(shù)資料
| 型號(hào)： | MT90221 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Quad IMA/UNI PHY Device(四端口 IMA/UNI 物理層設(shè)備（四端口ATM IMA和UNI處理器）) |
| 中文描述： | 四IMA的/單向物理層設(shè)備（IMA的四端口/單向物理層設(shè)備（四端口自動(dòng)柜員機(jī)IMA的和單向處理器）） |
| 文件頁(yè)數(shù)： | 7/116頁(yè) |
| 文件大?。?/td> | 309K |
| 代理商： | MT90221 |
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MT90221
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List of Figures
Figure 2 - Pin Connections..................................................................................................................................... 3
Figure 3 - Functional Block Diagram -Transmitter in IMA Mode........................................................................... 10
Figure 4 - Functional Block Diagram of the Transmitter in UNI Mode...................................................................15
Figure 5 - Cell Delineation State Diagram............................................................................................................ 15
Figure 6 - SYNC State Block Diagram ................................................................................................................. 16
Figure 7 - The MT90220 Receiver Circuit in IMA Mode ....................................................................................... 17
Figure 8 - Example of UNI Mode Operation ......................................................................................................... 23
Figure 9 - PCM Mode 2 and 6: ST-BUS Interface for T1 (Spaced Mapping) ....................................................... 26
Figure 10 - PCM Mode 2 and 6: ST-BUS Interface for T1 (Grouped Mapping) ................................................... 26
Figure 11 - PCM Mode 4 and 8: ST-BUS Interface for E1 ................................................................................... 27
Figure 12 - Mode 1 and 5: Generic PCM Interface for T1 .................................................................................... 28
Figure 13 - Mode 3 and 7: Generic PCM Interface for E1.................................................................................... 29
Figure 14 - TXCK and TXSYNC Output Pin Source Options ............................................................................... 29
Figure 15 - ATM Interface to MT90220 ................................................................................................................ 32
Figure 16 - ATM Interface to Multiple MT90220s ................................................................................................. 32
Figure 17 - ATM Mixed-Mode Interface to One MT90220.................................................................................... 33
Figure 18 - IRQ Register Hierarchy...................................................................................................................... 34
Figure 19 - PCM MODE 2 AND 4: Synchronous ST-BUS Mode.......................................................................... 78
Figure 20 - PCM MODE 2 and 4 CTC Mode.........................................................................................................79
Figure 21 - PCM MODE 2 AND 4: ITC Mode....................................................................................................... 80
Figure 22 - PCM MODE 1 and 3: Generic PCM System Interface........................................................................81
Figure 23 - PCM MODE 5 and 7: Asynchronous Operations................................................................................82
Figure 24 - ST-BUS Functional Timing Diagram.................................................................................................. 84
Figure 25 - ST-BUS Timing Diagram.................................................................................................................... 85
Figure 26 - Generic PCM Interface Timing Diagram .............................................................................................86
Figure 27 - Detailed Generic PCM Interface Timing Diagram.............................................................................. 87
Figure 28 - Setup and Hold Time Definition ......................................................................................................... 89
Figure 29 - Tri-State Timing.................................................................................................................................. 89
Figure 30 - External Memory Interface Timing - Read Cycle ............................................................................... 90
Figure 31 - External Memory Interface Timing - Write Cycle................................................................................ 91
Figure 32 - CPU Interface Timing - Read Access ................................................................................................ 93
Figure 33 - CPU Interface Motorola Timing - Write Access.................................................................................. 94
Figure 34 - CPU Interface Intel Timing - Write Access......................................................................................... 95
Figure 35 - JTAG Port Timing............................................................................................................................... 96
Figure 36 - System Clock and Reset.................................................................................................................... 97
Figure 37 - Metric Quad Flat Package - 208 Pin .................................................................................................. 98
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90221AL | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quad IMA/UNI PHY Device |
| MT90222 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:4/8/16 Port IMA/TC PHY Device |
| MT90222AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA - Trays |
| MT90222AG2 | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA /BAKE/DRYPACK - Trays |
| MT90223AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 80MBPS 2.5V 384BGA - Trays |
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