參數(shù)資料
型號(hào)： MT9076AB
廠商： Mitel Networks Corporation
英文描述： T1/E1/J1 3.3V Single Chip Transceiver
中文描述： T1/E1/J1收發(fā)3.3V的單芯片收發(fā)器
文件頁(yè)數(shù)： 111/160頁(yè)
文件大?。?/td> 416K
代理商： MT9076AB
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Preliminary Information
MT9076
107
Bit
Name
Functional Description
7
En
Enable.
Set high to attach the HDLC1 controller to the channel specified below. Set
low to disconnect the HDLC1.
6-5
- -
Reserved.
Must be kept at 0 for normal operation.
4-0
CH4-0
Channel 4-0.
This 5 bit number specifies the channel time HDLC1 will be attached
to if enabled. Channel 0 is the first channel in the frame. Channel 31 is the last
channel in an E1 frame. If enabled in a channel, HDLC data will be substituted for
data from DSTi on the transmit side. Receive data is extracted from the incoming
line data before the elastic buffer. Channel 0 selection is unavailable to this
controller.
Table 111 - HDLC1 Select
(Page 2, Address 1AH) (E1)
Bit
Name
Functional Description
7
En
Enable.
Set high to attach the HDLC2 controller to the channel specified below. Set low to
disconnect the HDLC2.
6-5
- -
Reserved.
Must be kept at 0 for normal operation.
4-0
CH4-0
Channel 4-0.
This 5 bit number specifies the channel time HDLC2 will be attached to if
enabled. Channel 0 is the first channel in the frame. Channel 31 is the last channel in an E1
frame. If enabled in a channel, HDLC data will be substituted for data from DSTi on the
transmit side. Receive data is extracted from the incoming line data before the elastic buffer.
Channel 0 selection is unavailable to this controller.
Table 112 - HDLC2 Select
(Page 2, Address 1BH) (E1)
Bit
Name
Functional Description
7
- -
Reserved.
Must be kept at 0 for normal operation.
6-0
CP6-0
Custom Pulse.
These bits provide the capability for programming the magnitude setting for
the TTIP/TRING line driver A/D converter during the first phase of a mark. The greater the
binary number loaded into the register, the greater the amplitude driven out. This feature is
enabled when the control bit 3 - CPL of the Custom Tx Pulse Enable Register - address 11H
of Page 2 is set high
Table 113 - Custom Pulse Word 1
(Page 2, Address 1CH) (E1)
Bit
Name
Functional Description
7
- -
Reserved.
Must be kept at 0 for normal operation.
6-0
CP6-0
Custom Pulse.
These bits provide the capability for programming the magnitude setting for
the TTIP/TRING line driver A/D converter during the second phase of a mark. The greater
the binary number loaded into the register, the greater the amplitude driven out. This feature
is enabled when the control bit 3 - CPL of the Custom Tx Pulse Enable Register - address
11H of Page 2 is set high
Table 114 - Custom Pulse Word 2
(Page 2, Address 1DH) (E1)
相關(guān)PDF資料
PDF描述
MT9076 T1/E1/J1 3.3V Single Chip Transceiver(T1/E1/J1 3.3V 單片收發(fā)器)
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MT90810 Flexible MVIP(Multi-Vendor Integration Protocol) Interface Circuit(彈性MVIP接口電路)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT9076AP 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:T1/E1/J1 3.3V Single Chip Transceiver
MT9076B 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1/J1 3.3 V Single Chip Transceiver
MT9076BB 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays
MT9076BB1 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays
MT9076BP 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1/J1 3.3 V Single Chip Transceiver
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