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參數(shù)資料
| 型號： | MT9076AB |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | T1/E1/J1 3.3V Single Chip Transceiver |
| 中文描述： | T1/E1/J1收發(fā)3.3V的單芯片收發(fā)器 |
| 文件頁數(shù)： | 29/160頁 |
| 文件大?。?/td> | 416K |
| 代理商： | MT9076AB |
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Preliminary Information
MT9076
25
It should be noted that the Mitel ST-BUS has 32 channels numbered 0 to 31. When mapping to the DS1
payload only the first 24 time slots and the last (time slot 31, for the overhead bit) of an ST-BUS are used (see
Table 6). All unused channels are tristate.
When signaling information is written to the MT9076 in T1 mode using ST-BUS control links (as opposed to
direct writes by the microport to the on - board signaling registers), the CSTi channels corresponding to the
selected DSTi channels streams are used to transmit the signaling bits.
Since the maximum number of signaling bits associated with any channel is 4 (in the case of ABCD), only half
a CSTi channel is required for sourcing the signaling bits. The choice of which half of the channel to use is
selected by the control bit MSN (page 01H address 14H). The same control bit selects which half of the CSTo
channel will contain receive signaling information (the other nibble in the channel being tristate). Unused
channels are tristate.
The most significant bit of an eight bit ST-BUS channel is numbered bit 7 (see Mitel Application Note MSAN-
126). Therefore, ST-BUS bit 7 is synonymous with DS1 bit 1; bit 6 with bit 2: and so on.
3.2
Frame and Superframe Structure in T1 mode
3.2.1
In T1 mode, DS1 trunks contain 24 bytes of serial voice/data channels bundled with an overhead bit. The frame
overhead bit contains a fixed repeating pattern used to enable DS1 receivers to deliniate frame boundaries.
Overhead bits are inserted once per frame at the beginning of the transmit frame boundary. The DS1 frames
are further grouped in bundles of frames, generally 12 (for D4 applications) or 24 frames (for ESF - extended
superframe applications) deep. Table 7 and 8 illustrate the D4 and ESF frame structures respectively.
Multiframing
For D4 links the frame structure contains an alternating 101010... pattern inserted into every second overhead
bit position. These bits are intended for determination of frame boundaries, and they are referred to as Ft bits.
A separate fixed pattern, repeating every superframe, is interleaved with the Ft bits. This fixed pattern
(001110), is used to deliniate the 12 frame superframe. These bits are referred to as the Fs bits. In D4 frames
# 6 and #12, the LSB of each channel byte may be replaced with A bit (frame #6) and B bit (frame #12)
signaling information.
For ESF links the 6 bit framing pattern 001011, inserted into every 4th overhead bit position, is used to
deliniate both frame and superframe boundaries. Frames #6, 12, 18 and 24 contain the A, B, C and D signaling
bits, respectively. A 4 kHz data link is embedded in the overhead bit position, interleaved between the framing
pattern sequence (FPS) and the transmit CRC-6 remainder (from the calculation done on the previous
superframe), see Table 8.
The SLC-96 frame structure is similar to the D4 frame structure, except a facility management overlay is
superimposed over the erstwhile Fs bits, see Table 9.
The protocol appropriate for the application is selected via the Framing Mode Selection Word, address 10H of
Master Control page 1. In T1 mode, MT9076 is capable of generating the overhead bit framing pattern and (for
ESF links) the CRC remainder for transmission onto the DS1 trunk. The beginning of the transmit multiframe
may be determined by any of the following criteria:
DS1 Timeslots
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Voice/Data Channels
(DSTi/o and CSTi/o)
0
1
2
3
4
5
6
7
7
9
10
11
12
13
14
15
Ds1 Timeslots
17
18
19
20
21
22
23
24
-
-
-
-
-
-
-
-
Voice/Data Channels
(DSTi/o and CSTi/o)
16
17
18
19
20
21
22
23
24
x
25
x
26
x
27
x
28
x
29
x
30
x
31
Sbit
Table 6 - ST-BUS vs. DS1 to Channel Relationship(T1)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT9076 | T1/E1/J1 3.3V Single Chip Transceiver(T1/E1/J1 3.3V 單片收發(fā)器) |
| MT9079 | Advanced Controller for E1(先進(jìn)的E1幀調(diào)節(jié)器和控制器) |
| MT9080B | SMX - Switch Matrix Module(用于消費(fèi)類轉(zhuǎn)換應(yīng)用的開關(guān)矩陣模塊) |
| MT90810 | Flexible MVIP(Multi-Vendor Integration Protocol) Interface Circuit(彈性MVIP接口電路) |
| MT90812 | Integrated Digital Switch (IDX)(集成數(shù)字開關(guān)) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9076AP | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:T1/E1/J1 3.3V Single Chip Transceiver |
| MT9076B | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1/J1 3.3 V Single Chip Transceiver |
| MT9076BB | 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays |
| MT9076BB1 | 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays |
| MT9076BP | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1/J1 3.3 V Single Chip Transceiver |
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