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參數(shù)資料
| 型號： | MT90810 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Flexible MVIP(Multi-Vendor Integration Protocol) Interface Circuit(彈性MVIP接口電路) |
| 中文描述： | 柔性MVIP（多廠商集成協(xié)議）接口電路（彈性MVIP接口電路） |
| 文件頁數(shù)： | 16/33頁 |
| 文件大小： | 176K |
| 代理商： | MT90810 |
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MT90810
Preliminary Information
2-184
Figure 8 - Frame Mode (FRMx_MODE) Register
Figure 9 - Frame Start (
1
FRMx_STRT) Register
2 [10]
8MHz streams
all four local streams are multiplexed onto pins LDI/
O[0]
Each channel occupies a 8Mb/s timeslot of 0.975
μ
s.
LDI/O[0]
(8MHz, 128
channels)
stream0, ch0
stream1, ch0
stream2, ch0
stream3, ch0
stream0, ch1
channel 0
channel 1
channel 2
channel 3
channel 4
etc....
LDI/O[0] = local stream 0
LDI/O[1] = local stream 1
3 [11]
Split 2MHz/4MHz streams
Local streams 0&1 are each configured to run at
2MHz on pins LDI/O[0] and LDI/O[1], respectively.
Local streams 2&3 are multiplexed onto pin LDI/O[2].
LDI/O[2]
(4MHz, 64
channels)
stream2, ch0
stream3, ch0
stream2, ch1
stream3, ch1
channel 0
channel 1
channel 2
channel 3
etc....
Mode
[bits]
Description
Multiplexing of streams onto pins
LDI/O[str] where str=stream (0-3)
Table 12 - SER_CNFG bits (control configuration of local serial streams)
7
6
5
4
3
2
1
0
VARIABLE
MODE
(dependent on MODE bits)
7
6
5
4
3
2
1
0
PROG_OUT(11:8)
MODE [00]
RESERVED
7
6
5
4
3
2
1
0
PROG_OUT(3:0)
MODE [01]
RESERVED
7
6
5
4
3
2
1
0
STRT
MODE [10/11]
FRM_TYPE
BIT_RATE
Note 1: FRMx represents either FRMA for group A,
or FRMB for Group B
7
6
5
4
3
2
1
0
MODE [01]
RESERVED
7
6
5
4
3
2
1
0
MODE [00]
PROG_OUT(7:0)
7
6
5
4
3
2
1
0
MODE [10/11]
STRT(7:0)
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