參數(shù)資料
型號: MT90810
廠商: Mitel Networks Corporation
英文描述: Flexible MVIP(Multi-Vendor Integration Protocol) Interface Circuit(彈性MVIP接口電路)
中文描述: 柔性MVIP(多廠商集成協(xié)議)接口電路(彈性MVIP接口電路)
文件頁數(shù): 29/33頁
文件大小: 176K
代理商: MT90810
Preliminary Information
MT90810
2-197
Figure 22 - Intel Multiplexed Bus Timing for Read Cycle (ALE is active)
Figure 23 - Intel Multiplexed Bus Timing for Write Cycle (ALE is active)
CS
AD[0:7]
ALE
t
AH
t
RDY
Add
Read Data
t
AS
RD
RDY
Notes:
RDY is only driven low during memory (slow) cyles.
t
DOFF
is measured from either CS or RD going high, whichever is later.
t
DAC
t
ACC
t
DOFF
AD[0:7]
Add
Write Data
CS
ALE
WR
RDY
Notes:
RDY is only driven low during memory (slow cyles).
t
DH
is measured from either CS or WR going high, whichever is earlier.
t
ACC
t
DAC
t
RDY
t
AH
t
AS
t
DH
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參數(shù)描述
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