參數(shù)資料
型號(hào): NT5SV8M16FT-75BI
廠商: NANYA TECHNOLOGY CORP
元件分類: DRAM
英文描述: 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: 0.400 MM, PLASTIC, TSSOP2-54
文件頁數(shù): 19/65頁
文件大小: 739K
代理商: NT5SV8M16FT-75BI
NT5SV8M16FS / NT5SV8M16FT
128Mb Synchronous DRAM
REV 1.4
08/2009
26
NANYA TECHNOLOGY CORPORATION
NANYA reserves the right to change products and specifications without notice.
Power Down Mode
In order to reduce standby power consumption, two power down modes are available: Precharge and Active Power Down
mode. To enter Precharge Power Down mode, all banks must be precharged and the necessary precharge delay (tRP) must
occur before the SDRAM can enter the power down mode. If a bank is activated but not performing a Read or Write operation,
Active Power Down mode will be entered. (Issuing a Power Down Mode Command when the device is performing a Read or
Write operation causes the device to enter Clock Suspend mode. See the following Clock Suspend section.) Once the Power
Down mode is initiated by holding CKE low, all of the receiver circuits except CKE are gated off. The Power Down mode does
not perform any refresh operations, therefore the device can’t remain in Power Down mode longer than the Refresh period
(tREF) of the device.
The Power Down mode is exited by bringing CKE high. When CKE goes high, a No Operation Command (or Device Deselect
Command) is required on the next rising clock edge.
Power Down Mode Exit Timing
COMMAND
NOP
COMMAND
NOP
CKE
: “H” or “L”
CK
Tm
Tm+2
Tm+1
Tm+3
Tm+4
Tm+5
Tm+6
Tm+7
Tm+ 8
tCES(min)
tCK
相關(guān)PDF資料
PDF描述
NT5TU64M16DG-3C 64M X 16 DDR DRAM, 0.45 ns, PBGA84
NTA2425E
NTA2425F
NTA2410-10
NTD2410F
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