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參數(shù)資料
| 型號(hào)： | PCI9060 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS |
| 中文描述： | 12O兼容的PCI總線主控接口芯片的適配器和嵌入式系統(tǒng) |
| 文件頁(yè)數(shù)： | 14/192頁(yè) |
| 文件大?。?/td> | 1551K |
| 代理商： | PCI9060 |
SECTION 1
PCI 9080
GENERAL DESCRIPTION
PLX Technology, Inc., 1997
Page 5
Version 1.02
1.4 COMPARISON OF PCI 9060, PCI 9060ES, PCI 9060SD, AND PCI 9080
Table 1-3. Comparison of the PCI 9060, PCI 9060ES, PCI 9060SD, and PCI 9080
Feature
PCI 9060
PCI 9060ES
PCI 9060SD
PCI 9080
Number of DMA Channel(s)
2
0
1
2
Local Address Spaces
2
2
3
3
Direct Master Mode
Yes
Yes
No
Yes
Mailbox Registers
Eight 32 bit
Four 32 bit
Four 32 bit
Eight 32 bit
Doorbell Registers
Two 32 bit
Two 8 bit
Two 8 bit
Two 32 bit
FIFOs
8
4
4
8
FIFO Depth—Direct Slave Write, Direct Master
Write, DMA 0 Read and DMA 0 Write
8 Lwords
(32 bytes)
16 Lwords
(64 bytes)
16 Lwords
(64 bytes)
32 Lwords
(128 bytes)
FIFO Depth —Direct Slave Read, Direct Master
Read, DMA 1 Read and DMA 1 Write
8 Lwords
(32 bytes)
16 Lwords
(64 bytes)
16 Lwords
(64 bytes)
16 Lwords
(64 bytes)
LLOCKo# Pin for Lock Cycles
No
Yes
Yes
Yes
WAITI# Pin for Wait State Generation
No
Yes
Yes
Yes
BPCLKo Pin; Buffered PCI Clock
No
Yes
Yes
Yes
DREQ# and DACK# Pins for Demand Mode
DMA Support
Yes
No
Yes
(Channel 1 only)
Yes
Register Addresses
—
Identical except
9060ES has no
DMA registers and
Tables 25, 26, and 43
were added
Identical, except
9060SD has one
DMA register and
Tables 4-29 and 4-30
were added
Identical except PCI
9080 has additional
I
O related registers
and 30h, 34h, 40h,
and 44h were
remapped
Pin Out
Note:
for PCI 9060, PCI 9060ES, and PCI 9060SD.
PCI 9080 includes all changes made
—
Signals deleted:
DREQ0# (pin 29)
DACK0# (pin 30)
Input signals added:
WAITI# (pin 6)
BIGEND# (pin 48)
Output signals added:
BPCLKo (pin 168)
LLOCKo# (pin 7)
Signals deleted:
BREQ (pin 21)
DMPAF# (pin 8)
DREQ0# (pin 29)
DACK0# (pin 30)
BTERMo# (pin 28)
Input signals added:
WAITI# (pin 6)
BIGEND# (pin 48)
EOT0# (pin 164 in
C mode, Pin 5 in
J and S modes)
Output signals added:
BPCLKo (pin 168)
LLOCKo# (pin 7)
Input signal added:
EOT1# (pin 163)
Signal changed:
EESEL (pin 175)
Big/Little Endian Conversion
No
Yes
Yes
Yes
Spec. 2.1 Deferred Reads
No
Yes
Yes
Yes
Programmable Prefetch Counter
No
Yes
Yes
Yes
Write and Invalidate Cycle
No
Yes
Yes
Yes
Additional Device and Vendor ID Register
No
Yes
Yes
Yes
I
2
O Messaging Unit
No
No
No
Yes
3.3 V PCI Bus Signaling
No
No
No
Yes
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCI9080 | 12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS |
| PCI9060ES | 12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS |
| PCI9060SD | 12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS |
| PCI950PT | PC Card Support |
| PCI9656-AC66BI | Controller Miscellaneous - Datasheet Reference |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCI90603A | 制造商:PLX Technology 功能描述: |
| PCI9060-3A | 制造商:PLX Technology 功能描述: |
| PCI9060-3AF | 功能描述:數(shù)字總線開(kāi)關(guān) IC PCI Bus Interface RoHS:否 制造商:Texas Instruments 開(kāi)關(guān)數(shù)量:24 傳播延遲時(shí)間:0.25 ns 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-56 封裝:Reel |
| PCI9060ES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS |
| PCI9060ESF | 功能描述:數(shù)字總線開(kāi)關(guān) IC PCI Bus Interface RoHS:否 制造商:Texas Instruments 開(kāi)關(guān)數(shù)量:24 傳播延遲時(shí)間:0.25 ns 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-56 封裝:Reel |
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