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參數(shù)資料
| 型號(hào)： | PCI9060 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS |
| 中文描述： | 12O兼容的PCI總線主控接口芯片的適配器和嵌入式系統(tǒng) |
| 文件頁(yè)數(shù)： | 85/192頁(yè) |
| 文件大小： | 1551K |
| 代理商： | PCI9060 |
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SECTION 4
PCI 9080
REGISTERS
PLX Technology, Inc., 1997
Page 76
Version 1.02
4.5.12 (CNTRL; PCI:6Ch, LOC:ECh) Serial EEPROM Control, PCI Command Codes, User I/O
Control, Init Control Register
Table 4-59. (CNTRL; PCI:6Ch, LOC:ECh) Serial EEPROM Control, PCI Command Codes, User I/O Control, Init
Control Register
Field
Description
Read
Write
Value after Reset
3:0
PCI Read Command Code for DMA. This PCI command is sent out during DMA
read cycles.
Yes
Yes
1110
7:4
PCI Write Command Code for DMA. This PCI command is sent out during DMA
write cycles.
Yes
Yes
0111
11:8
PCI Memory Read Command Code for Direct Master. This PCI command is sent
out during Direct Master read cycles.
Yes
Yes
0110
15:12
PCI Memory Write Command Code for Direct Master. This PCI command is sent
out during Direct Master write cycles.
Yes
Yes
0111
16
General Purpose Output. Value of 1 causes USERO output to go high. Value of 0
causes USER0 output to go low.
Yes
Yes
1
17
General Purpose Input. Value of 1 indicates USERI input pin is high. Value of 0
indicates USERI pin is low.
Yes
No
—
23:18
Reserved.
Yes
No
0
24
Serial EEPROM Clock for Local or PCI Bus Reads or Writes to serial EEPROM.
Toggling this bit generates a serial EEPROM clock. (Refer to the manufacturer’s
data sheet for the particular serial EEPROM being used.)
Yes
Yes
0
25
Serial EEPROM Chip Select. For local or PCI bus reads or writes to serial
EEPROM, setting this bit to 1 provides the serial EEPROM chip select.
Yes
Yes
0
26
Write Bit to serial EEPROM. For writes, this output bit is the input to the serial
EEPROM. Clocked into the serial EEPROM by the serial EEPROM clock.
Yes
Yes
0
27
Read serial EEPROM Data Bit. For reads, this input bit is the output of the serial
EEPROM. Clocked out of the serial EEPROM by the serial EEPROM clock.
Yes
No
—
28
Serial EEPROM Present. Value of 1 indicates a serial EEPROM is present.
Yes
No
0
29
Reload Configuration Registers. When this bit is set to 0, writing a 1 causes PCI
9080 to reload the local configuration registers from serial EEPROM.
Yes
Yes
0
30
PCI Adapter Software Reset. Value of 1 holds the local bus logic in the PCI 9080
reset and LRESETo# asserted. The contents of the PCI configuration registers and
Shared Run Time registers will not be reset. Software Reset can only be cleared
from the PCI bus. (Local bus remains reset until this bit is cleared.)
Yes
Yes
0
31
Local Init Status. Value of 1 indicates Local Init done. Responses to PCI accesses
are RETRYs until this bit is set. While input pin NB# is asserted low, this bit is
forced to 1.
Yes
Yes
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCI9080 | 12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS |
| PCI9060ES | 12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS |
| PCI9060SD | 12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS |
| PCI950PT | PC Card Support |
| PCI9656-AC66BI | Controller Miscellaneous - Datasheet Reference |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCI90603A | 制造商:PLX Technology 功能描述: |
| PCI9060-3A | 制造商:PLX Technology 功能描述: |
| PCI9060-3AF | 功能描述:數(shù)字總線開關(guān) IC PCI Bus Interface RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:24 傳播延遲時(shí)間:0.25 ns 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-56 封裝:Reel |
| PCI9060ES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS |
| PCI9060ESF | 功能描述:數(shù)字總線開關(guān) IC PCI Bus Interface RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:24 傳播延遲時(shí)間:0.25 ns 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-56 封裝:Reel |
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