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參數(shù)資料
| 型號： | PEB2445N |
| 廠商： | SIEMENS AG |
| 英文描述： | LTM4600 Evaluation Kit |
| 中文描述： | ？多點交換和會議股-衰減？ |
| 文件頁數(shù)： | 26/70頁 |
| 文件大?。?/td> | 1236K |
| 代理商： | PEB2445N |
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PEB 2445
Functional Description
Semiconductor Group
26
02.96
Definitions
The PEB 2445 works with either an 8192-kHz clock or a 4096-kHz clock. Henceforth,
the respective clock periods are referred to as
t
CP8
and
t
CP4
.
The bits of a time-slot are numbered 0 through 7. Bit 0 (MSB) of a time-slot is the first
bit to be received or transmitted by the MUSAC-A, bit 7 (LSB) the last.
Preparation of the Input Data (Input Buffer)
The PEB 2445 works in 2048-, 4096- or 8192-kbit/s PCM systems. The frame frequency
is 8000 Hz in all 3 types of systems. Therefore a frame consists of 32-, 64- or
128 time-slots of 1 byte each, respectively. In order to fill the speech memory, which has
a fixed capacity of 512 channels, either 16-, 8- or 4 input lines are necessary,
respectively. Thus, in 4- and 8-MHz systems only some of the 16 input lines can be used.
Moreover, the PEB 2445 can also work with two different input data rates
simultaneously. In this case some of the PCM-input lines operate at one data rate, while
others operate at another.
Table 2
states how many input lines are operating at the
different data rates for all possible input data rate combinations. In the following they will
be referred to as input modes.
The input mode the PEB 2445 is actually working in has to be programmed into the mode
register, bits Ml1, Ml0, MO1, MO0. In
chapter 4.1
you will find a complete description
which input line is connected to which system, for each of the input modes.
Table 2
Possible Input Modes
The PEB 2445 runs with either a 4096- or a 8192-kHz device clock as selected with
CFR:CPS
. Data rates and clock frequencies may be combined freely. However,
processing 8192-kbit/s data, an 8192-kHz clock must be supplied.
The preparation of the input data according to the selected input mode is made in the
input buffer. It converts the serial data of a time-slot to parallel form.
In
standard configuration
time-slot 0 begins with the rising edge of the SP pulse as
shown in upper half of
figure 12
denoted
CSR:(0000XXXX)
.
Input Modes
16
8
4
2
×
8192
4
×
4096
Type
Single mode
Single mode
Single mode
Mixed mode
Mixed mode
×
×
×
+
+
2048
4096
8192
8
×
2048
8
×
2048
kbit/s
kbit/s
kbit/s
kbit/s
kbit/s
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PEB2445-N | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Multipoint Switching and Conferencing Unit - Attenuation MUSAC-A |
| PEB2445P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM， Other/Special/Miscellaneous |
| PEB2447 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Memory Time Switch Extended Large MTSXL |
| PEB2447H | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Memory Time Switch Extended Large MTSXL |
| PEB2447HV1.2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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