參數(shù)資料
型號： PEF2015
廠商： SIEMENS A G
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Mini IOM-2 Controller MICO
中文描述： SPECIALTY TELECOM CIRCUIT, PDSO28
文件頁數(shù)： 50/84頁
文件大小： 1568K
代理商： PEF2015
PEF 2015
Registers Summary
Semiconductor Group
50
12.97
4.
Writing data to the upstream or downstream CM-data and code field
(e.g. switching a CFI to/from PCM-connection).
The 4-bit code field of the control memory (CM) defines the functionality of a
CFI time slot and thus the meaning of the corresponding data field. This 4-bit
code, written to the MACR:CMC3..0 bit positions, will be transferred to the
CM-code field. The 8-bit MADR value is at the same time transferred to the
CM-data field. There are codes for switching applications, pre-processed
applications and for direct
μ
P-access applications, as shown below:
a) Switching Applications
CMC = 0000
Unassigned channel (e.g. cancelling an assigned channel)
CMC = 0001
Bandwidth 64 kbit/s
CMC = 0010
Bandwidth 32 kbit/s
CMC = 0011
Bandwidth 32 kbit/s
CMC = 0100
Bandwidth 16 kbit/s
CMC = 0101
Bandwidth 16 kbit/s
CMC = 0110
Bandwidth 16 kbit/s
CMC = 0111
Bandwidth 16 kbit/s
Note: The corresponding CFI time slot bits to be transferred are chosen in the
CSCR-register.
PCM time slot bits transferred: 7..0
PCM time slot bits transferred: 3..0
PCM time slot bits transferred: 7..4
PCM time slot bits transferred: 1..0
PCM time slot bits transferred: 3..2
PCM time slot bits transferred: 5..4
PCM time slot bits transferred: 7..6
b)Pre-processed Applications
Downstream:
MACR:
0
1
1
1
CMC3
CMC2
CMC1
CMC0
Application
Decentral D-channel handling
Central D-channel handling
Even CM Address
CMC = 1000
CMC = 1010
Odd CM Address
CMC = 1011
CMC = PCM-code for a
2-bit subtime slot
CMC = 1011
CMC = 1011
6-bit Signaling (e.g. analog IOM)
8-bit Signaling (e.g. SLD)
CMC = 1010
CMC = 1010
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