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參數(shù)資料
| 型號： | POE-VOICE-RD |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 64/108頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT REF DESIGN PWR OVER ETHERNET |
| 標準包裝： | 1 |
| 主要目的： | 參考設計，以太網(wǎng)供電（POE），語音傳輸 |
| 嵌入式： | 是，MCU，8 位 |
| 已用 IC / 零件： | C8051F340，CP2201，Si3400 |
| 主要屬性： | 嵌入式以太網(wǎng)，以太網(wǎng)供電，8 kHz 語音采樣系統(tǒng) |
| 次要屬性： | 圖形用戶界面 |
| 已供物品： | 板，線纜，電源，軟件 |
| 產(chǎn)品目錄頁面： | 626 (CN2011-ZH PDF) |
| 相關產(chǎn)品： | 336-1385-ND - IC POWER OVER ETHERNET 20QFN 336-1322-ND - IC POWER OVER ETHERNET 20QFN 336-1313-ND - IC ETH CTRLR SNGL-CHIP 28QFN 336-1298-ND - IC 8051 MCU FLASH 64K 48TQFP |
| 其它名稱： | 336-1326 |
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CP2200/1
Rev. 1.0
59
Note: The value of CPADDRH:CPADDRL may be invalid if an overflow event occurs. After an overflow, the FIFOHEADH:FIFO-
HEADL pointer should be used to determine the starting address of the current packet. CPLEN will always remain valid
even after an overflow event.
Note: If the Receive FIFO Full Interrupt is triggered, the interrupt flag must be cleared to re-enable packet reception. The
Receive FIFO Full Interrupt is triggered based on the size of packets or on the number of packets. If triggered based on
the number of packets, then pointer corruption has occurred.
12.4. Initializing the Receive Buffer, Filter and Hash Table
After a device reset, the receive buffer is empty and the filter is configured to accept broadcast packets and
multicast packets matching a hash value of 0x0400. This hash value allows PAUSE control packets to pass
through the receive filter.
The receive buffer does not require any additional initialization. The receive filter can be configured to accept or
ignore broadcast packets, multicast packets, runt packets (Ethernet Frame smaller than 64 bytes), and packets
with a CRC error. The receive filter is configured using the RXFILT register.
The device can be configured to accept broadcast packets and packets addressed to the controller’s MAC address
without using the hash table. If multicast packets need to be accepted, then the hash table can be programmed to
accept packets addressed to specific address ranges.
The CP2200/1 implements a 16-bit hash table to represent all possible addresses in the 64-bit address space.
Each of the possible 65536 possible values for the hash table represent a range of MAC addresses. If all 16 bits
are set to ‘1’, all multicast addresses will be accepted. If all 16-bits are set to ‘0’, then all multicast addresses will be
rejected.The following procedure can be used to determine which bits to set for a specific address:
Step 1: Perform a 32-bit CRC on the 6-bytes of the address using 0xC704DD7B as the polynomial.
Step 2: Record the least significant 4 bits of the CRC result (Hash Index).
Step 3: The Hash Index determines the bit that should be set in the hash table that will allow the address to
be received. For example, if the least significant 4-bits of the CRC result are 101b (5d), then setting
bit 5 of the 16-bit hash table will allow all MAC addresses whose CRC result is 5d to be accepted.
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