參數(shù)資料
型號(hào): PSD301L
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入)
中文描述: 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備(可編程邏輯,16K的位的SRAM,19余個(gè)可編程輸入/輸出,通用PLD的有12個(gè)輸入)
文件頁數(shù): 19/23頁
文件大?。?/td> 118K
代理商: PSD301L
Flash Memory – Application Note 048
3-37
“Port E pin assignments; pe0-1 are used as psen and ale inputs, respectively
pe2
pe3
pe4
pe5
pe6
pe7
pin 36;
pin 34;
pin 33;
pin 32;
pin 31;
pin 30;
“Port E pin pe2
“Port E pin pe3
“Port E pin pe4
“Port E pin pe5
“Port E pin pe6
“Port E pin pe7
“**************** DPLD Outputs and other internal node declaration ****************
“The following are DPLD outputs (chip selects) for EPROM, SRAM & I/O Port
rs0,es0,es1,es2,es3,csiop node;
“The following are Page Register outputs; they can be used as a data
“l(fā)atch for GPLD input if paging is not needed
pgr3, pgr2, pgr1, pgr0 node;
“Use the pgr3 bit to determine if the system is in the flash program mode or the
“operational mode. When this bit is a one, the system is in the flash program mode.
“DEFINITIONS
X = .x.;
clk = .c.;
page = [pgr1,pgr0];
program = pgr3;
“Don’t care
“Clock pulse
“address a7-a2 are not available as inputs to the GPLD unless
“it has been assigned to Port A pins
address = [a15,a14,a13,a12,a11,a10,a9,a8,X,X,X,X,X,X,a1,a0];
EQUATIONS
“If a7-a2 are assigned to Port A, they need to be latched by ALE in the
“l(fā)ogic equations that follow:
“a7.le = ale;
a6.le = ale;
Appendix B
(cont.)
相關(guān)PDF資料
PDF描述
PSD302R Field Programmable Microcontroller Peripherals(可編程邏輯,無SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入)
PSD303L Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入)
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PSD311L Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入)
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