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參數(shù)資料
| 型號(hào)： | PSD301L |
| 英文描述： | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入) |
| 中文描述： | 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備（可編程邏輯，16K的位的SRAM，19余個(gè)可編程輸入/輸出，通用PLD的有12個(gè)輸入） |
| 文件頁數(shù)： | 4/23頁 |
| 文件大?。?/td> | 118K |
| 代理商： | PSD301L |
3-22
Flash Memory – Application Note 048
As shown in Figure 1, the basic blocks of a simple partitioned design consists of a ROMless
Microcontroller, a PSD device, and a Flash Memory. The Microcontroller interfaces directly
to the PSD device. The Flash Memory interfaces to the PSD device through the PSD’s I/O
ports. The system boots up out of the PSD’s EPROM. This boot code should be able to
bring the system up to a mode of operation that includes the ability to program the Flash
Memory. This includes operation of a serial port to download data into local SRAM. The
boot code will also interrogate the Flash Memory to determine which Flash Memory vendor
is being used. Since each Flash Memory vendor uses a different programming algorithm,
all algorithms will be stored in the PSD’s EPROM. This will allow the designer to use the
least expensive pin compatible Flash Memory.
The PSD’s EPROM will store the boot code along with the Flash Memory programming
algorithms for all types of Flash Memories being used in production. The PSD’s General
PLD (GPLD) will be used for address decoding to generate the Flash Memory Chip Selects,
to generate upper Flash Memory address lines needed for paging, and serve as additional
PLD logic required in the system. The PSD’s I/O Ports will be used to latch the address
lines when a Microcontroller is used with a multiplexed address/data bus. These I/O Ports
will also be used for other port expansion required in the system. The built-in Page
Register (not available on the PSD3X1 so use the I/O ports instead) will be used to extend
the addressing capabilities of the Microcontroller. When using an 80C31, one bit of the
Page Register will be used to change the address map from an Operational Mode to a
Programming Mode.
The PSD Flash
Solution
ROMless
MCU
PSDXXX
FLASH
MEMORY
DATA BUS
ADDRESS/DATA BUS
CONTROL SIGNALS
ADDRESS LINES
CONTROL SIGNALS
Figure 1. Flash Support Chip Solution
Examples of implementing a Flash Memory with an 80C31 will be shown with both a
PSD311 and a PSD411A1. In these examples, an 80C31 is being used with 128 Kbytes of
external Flash Memory and 32 Kbytes of SRAM. The memory map during the normal
Operational Mode is show in Figure 2. In the Program Space, the PSD’s EPROM containing
the boot code and programming algorithms along with a portion of Flash Memory are
common to all pages of memory. The rest of the Flash Memory is spread over three pages
(or banks) of memory. The Data Space is the same for all pages of memory. When
programming the Flash Memory, a bit is set in the Page Register to switch the memory map
from an Operational Mode to a Programming Mode as shown in Figure 3. The PSD’s
EPROM that is executing the programming algorithms is still located into the Program
Space while the Flash Memory has moved into the Data Space. The 32 Kbytes of SRAM is
disabled since the Flash Memory is mapped over it. The external chip selects and the
PSD’s SRAM and I/O Ports are unaffected and can be accessed on any memory page.
While executing from the PSD’s EPROM, the system downloads the data from an external
Serial Port to the PSD’s SRAM. The data is then programmed into the Flash Memory. Note
that the chip select to the Flash Memory should cover the programming command
addresses (for example, the AMD29010 programming command addresses are 2AAAH and
5555H with A15 = Don’t Care). See the Flash Memory vendor’s data book for more details.
80C31 Example
相關(guān)PDF資料 |
PDF描述 |
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| PSD302R | Field Programmable Microcontroller Peripherals(可編程邏輯,無SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入) |
| PSD303L | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入) |
| PSD303 | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入) |
| PSD311L | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入) |
| PSD311 | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD301L-15J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD301L-15JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD301L-15LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD301L-15LM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD301L-15U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
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