參數(shù)資料
型號(hào): PSD301L
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入)
中文描述: 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備(可編程邏輯,16K的位的SRAM,19余個(gè)可編程輸入/輸出,通用PLD的有12個(gè)輸入)
文件頁數(shù): 20/23頁
文件大?。?/td> 118K
代理商: PSD301L
3-38
Flash Memory – Application Note 048
“***************************************** DPLD equations *****************************************
“The DPLD acts as the address decoder and generates chip select signals
“that select the internal PSD resources. The address is latched internally by the ALE.
“The PSD drives the data bus only if one of the select lines and rd or psen are active.
“The following DPLD equations are examples only. Change the address space
“to fit the selected PSD device.
“rs0 is the internal PSD SRAM chip select that is active high.
“The read and write lines are connected to the SRAM in the PSD
“so only the address is necessary in the equation. The SRAM
“occupies 2KB of memory space and is defined in 2KB boundaries.
rs0 = ((address >= ^h0800) & (address <=
^
h0FFF));
“es0-es3 are internal PSD EPROM block chip selects that are active high.
“The psen signal is used internally in the PSD to qualify these chip selects.
es0 = ((address >= ^h0000) & (address <= ^h1FFF)) ;
es1 = ((address >= ^h2000) & (address <= ^h3FFF)) ;
“csiop is the internal PSD chip select for all of the PSD configuration
“and I/O registers. csiop takes up 256 bytes of memory space and is active
“high. See ‘System Configuration Section’ in the PSD Data Book for the
“address offsets of the registers.
csiop = ((address >= ^h0000) & (address <= ^h00FF));
“************************************** GPLD equations **************************************
Flash_A16 = a15 & ((page == 1) # (page == 2));
Flash_A15 = a15 & ((page == 0) # (page == 2));
Flash_OE
Flash_WR = !(program & !wr);
Flash_CS
= !((address >=
^
h4000) & (address <=
^
hFFFF));
= !((!program & !psen) # (program & !rd));
end
Appendix B
(cont.)
相關(guān)PDF資料
PDF描述
PSD302R Field Programmable Microcontroller Peripherals(可編程邏輯,無SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入)
PSD303L Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入)
PSD303 Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入)
PSD311L Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入)
PSD311 Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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