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參數(shù)資料
| 型號(hào)： | RG82845MZ |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項(xiàng)-數(shù)據(jù)表參考 |
| 文件頁(yè)數(shù)： | 69/157頁(yè) |
| 文件大?。?/td> | 1407K |
| 代理商： | RG82845MZ |
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Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
250687-002
Datasheet
19
R
Table 3. MCH-M Clock Ratio Table
Interface
Speed
CPU System Bus Frequency Ratio
System Memory
DDR 200 MHz
1:1 synchronous
AGP
66 MHz
Asynchronous
Hub interface
66 MHz
Asynchronous
1.7.
System Interrupts
The Intel 845MP/845MZ Chipset MCH-M supports both 8259 and Intel Mobile Pentium 4 Processor-M
interrupt delivery mechanisms. The serial APIC interrupt mechanism is not supported.
The 8259 support consists of flushing inbound hub interface write buffers when an Interrupt
Acknowledge cycle is forwarded from the system bus to the hub interface.
The Intel 845MP/845MZ Chipset MCH-M supports the Mobile Intel Pentium 4 Processor-M interrupt
delivery mechanism. PCI MSI interrupts are generated as Memory Writes. The MCH-M decodes
upstream Memory Writes to the range 0FEE0_0000h - 0FEEF_FFFFh from AGP and the hub interface
as message based interrupts. The MCH-M forwards the Memory Writes, along with the associated write
data, to the system bus as an Interrupt Message transaction. Note that since this address does not decode
as part of main memory, the write cycle and the write data does not get forwarded to DRAM via the write
buffer. The Intel 845MP/845MZ Chipset MCH-M provides the response and TRDY# for all Interrupt
Message cycles including the ones originating from the MCH-M. The Intel 845MP/845MZ Chipset
MCH-M supports interrupt re-direction for inter-processor interrupts (IPIs) as well as upstream interrupt
memory writes.
For message based interrupts, system write buffer coherency is maintained by relying on strict ordering
of Memory Writes. The Intel 845MP/845MZ Chipset MCH-M ensures that all Memory Writes received
from a given interface prior to an interrupt message Memory Write are delivered to the system bus for
snooping in the same order that they occur on the given interface.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| RG82845PE S L6H5 | 制造商:Intel 功能描述:CHIPSTGMCH 82845PE HT-PBGA760 |
| RG82845PESL6Q3 | 制造商:Intel 功能描述:Chipsets |
| RG82845-SL5V7 | 制造商:Intel 功能描述:INTEL 845G GRAPHICS AND MEMORY CONTROLLER HUB(GMCH) |
| RG82845SL5YQ | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Intel?? 845 Chipset: 82845 Memory Controller Hub (MCH) for SDR |
| RG82845-SL63W | 制造商:Intel 功能描述:INTEL 845G GRAPHICS AND MEMORY CONTROLLER HUB(GMCH) |
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