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參數(shù)資料
| 型號(hào)： | S1C7XXXF00E199 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, 90 MHz, RISC MICROCONTROLLER, PQFP |
| 文件頁(yè)數(shù)： | 72/196頁(yè) |
| 文件大?。?/td> | 1650K |
| 代理商： | S1C7XXXF00E199 |
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7 DETAILS OF INSTRUCTIONS
S1C17 FAMILY S1C17 CORE MANUAL
EPSON
7-99
or
%rd, %rs
or/c %rd, %rs
or/nc %rd, %rs
Function
16-bit logical OR
Standard)
rd
(15:0)
← rd(15:0) | rs(15:0), rd(23:16) ← 0
Extension 1) rd(15:0)
← rs(15:0) | imm13(zero extended), rd(23:16) ← 0
Extension 2) rd(15:0)
← rs(15:0) | imm16, rd(23:16) ← 0
Code
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0 0 1 0 1 1
r d
1 0 0 1
r s
or
|
0 0 1 0 1 1
r d
0 0 0 1
r s
or/c
|
0 0 1 0 1 1
r d
0 1 0 1
r s
or/nc
|
Flag
IL IE
C
V
Z
N
– – – 0
|
Mode
Src:Register direct %rs = %r0 to %r7
Dst:Register direct %rd = %r0 to %r7
CLK
One cycle
Description (1) Standard
or
%rd,%rs
; rd
← rd | rs
The content of the rs register and that of the rd register are logically OR’ed, and the result is
loaded into the rd register. The operation is performed in 16-bit size, and bits 23–16 of the rd
register are set to 0.
(2) Extension 1
ext
imm13
or
%rd,%rs
; rd
← rs | imm13
The content of the rs register and the zero-extended 13-bit immediate imm13 are logically OR’
ed, and the result is loaded into the rd register. The operation is performed in 16-bit size, and
bits 23–16 of the rd register are set to 0. The content of the rs register is not altered.
(3) Extension 2
ext
imm13
; imm13(2:0) = imm16(15:13)
ext
imm13
; = imm16(12:0)
or
%rd,%rs
; rd
← rs | imm16
The content of the rs register and the zero-extended 16-bit immediate imm16 are logically OR’
ed, and the result is loaded into the rd register. The operation is performed in 16-bit size, and
bits 23–16 of the rd register are set to 0. The content of the rs register is not altered.
(4) Conditional execution
The /c or /nc suffix on the opcode specifies conditional execution.
or/c
Executed as or when the C flag is 1 or executed as nop when the flag is 0
or/nc
Executed as or when the C flag is 0 or executed as nop when the flag is 1
In this case, the ext instruction can be used to extend the operand.
(5) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the “d” bit. In this case, extension of the immediate by the ext
instruction cannot be performed.
Example
(1) or
%r0,%r0
; r0 = r0 | r0
(2) ext
0x1
ext
0x1fff
or
%r1,%r2
; r1 = r2 | 0x3fff
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