參數(shù)資料
型號: SAA1575HL
廠商: NXP SEMICONDUCTORS
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Global Positioning System (GPS)baseband processor(通用定位系統(tǒng)基帶處理器)
中文描述: SPECIALTY TELECOM CIRCUIT, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, SOT-407-1, LQFP-100
文件頁數(shù): 10/56頁
文件大?。?/td> 744K
代理商: SAA1575HL
1999 Jun 04
10
Philips Semiconductors
Product specification
Global Positioning System (GPS)
baseband processor
SAA1575HL
RFLE
91
O
RFIC setup latch
: output used to latch the RFIC set-up into the active UAA1570HL
control registers
MSB IF input
: MSB of the 2-bit GPS digital IF signal input. Clocked in on the rising
edge of SCLK. If only a 1-bit IF input is available this input should be held HIGH.
LSB IF input
: LSB of the 2-bit GPS digital IF signal input. Clocked in on the rising
edge of SCLK.
GPIO bit 2
: standard general purpose I/O mapped into the segment 15 of the address
space. The top 4 bits can be used as the XA external timer control access pins
(T0, T1, T2 and T2EX).
GPIO bit 1
: standard general purpose I/O mapped into the segment 15 of the address
space. The top 4 bits can be used as the XA external timer control access pins
(T0, T1, T2 and T2EX).
GPIO bit 0
: standard general purpose I/O mapped into the segment 15 of the address
space. The top 4 bits can be used as the XA external timer control access pins
(T0, T1, T2 and T2EX).
Not connected
: do not connect
Reference clock
: input from the TXCO reference. Not used internally. This is divided
under firmware control to produce the sample clock, SCLK, used to gate the IF inputs.
Test pin
: connect to pin 100
Test pin
: connect to pin 99
IF2
92
I
IF1
93
I
GPIO2
94
I/O
GPIO1
95
I/O
GPIO0
96
I/O
n.c.
RCLK
97
98
O
I
TEST1
TEST2
99
100
I
O
SYMBOL
PIN
I/O
DESCRIPTION
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