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參數(shù)資料
| 型號： | SAA1575HL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Global Positioning System (GPS)baseband processor(通用定位系統(tǒng)基帶處理器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, SOT-407-1, LQFP-100 |
| 文件頁數(shù)： | 25/56頁 |
| 文件大?。?/td> | 744K |
| 代理商： | SAA1575HL |
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1999 Jun 04
25
Philips Semiconductors
Product specification
Global Positioning System (GPS)
baseband processor
SAA1575HL
7.8.4.1
Sleep mode
The sleep mode is intended to overlay the function of the
standard 80C51XA Idle mode. Sleep is initiated by a
firmware or external serial link command. This initiates a
firmware routine which performs the following:
1.
Send serial command to power-down RF IC
(UAA1570HL)
2.
Inhibit RCLK, IF2 and IF1 inputs to SAA1575HL
3.
Enter standard 80C51XA Idle state.
In sleep mode the RCLK and IF inputs are prevented from
entering the IC. This capability is included to cover the
situation in which the SAA1575HL is used with a front-end
which does not respond to the power-down command in a
similar way to the UAA1570HL. Sleep mode can be exited
by any active hardware interrupt, for example a UART
interrupt. The sleep mode has no effect on the operation of
the RTC.
7.8.4.2
Idle mode
The Idle mode is initiated by a firmware or external serial
link command. This is a direct use of the standard
80C51XA Idle mode. The interrupt signals from the active
peripherals such as UARTs, timers, host interface and
external interrupts will cause the CPU to resume execution
from the point at which it was halted. In the Idle mode, all
of the output pins retain their logic states from their
‘pre-idle’ position. No other action is taken on entering Idle
mode. In particular, the correlators will remain active since
RCLK, IF1 and IF2 will not be prevented from entering the
IC.
7.9
Clock signals and oscillators
The SAA1575HL requires 3 clock signals for full operation:
XTAL1: Processor (system) clock
XTAL3: Real-time clock crystal frequency (optional)
RCLK: GPS reference clock.
Two of these clocks, XTAL1 and XTAL3, can be generated
by on-chip oscillator circuits. The third, RCLK, must be
supplied from an external source; in most applications a
temperature compensated oscillator module.
7.9.1
S
YSTEM CLOCK
(XTAL1)
The SAA1575HL requires a system clock for the on-chip
processor and related peripheral blocks. This can be
provided from an external clock source via the XTAL1
input pin or by using the on-chip oscillator circuit with an
external resonating element connected between the
XTAL1 and XTAL2 pins. In most circumstances this would
be an external crystal accompanied by two capacitors
connected to ground, a series resistor (to optimize power
consumption) and a shunt resistor to ensure start-up under
all conditions.
Optimum values of C, R
P
and R
S
will depend on the crystal
used. However, typical values would be C = 20 pF,
R
P
= 1 M
and R
S
= 200
. The hardware places a
restriction on the range of frequencies for which correct
operation will occur; 26 MHz < f
XTAL1
< 32 MHz.
However, the restriction on operating frequency imposed
by the firmware is tighter than this. The standard Philips
firmware has been written on the assumption of a 30 MHz
system clock frequency.
Fig.13 System clock oscillator circuit.
handbook, halfpage
MHB472
OSCILLATOR
XTAL2
XTAL1
XTAL
C
C
on-chip
RP
(optional)
RS
(optional)
system
clock
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