參數(shù)資料
型號： SAA5667HL/NNNN
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-407-1, LQFP-100
文件頁數(shù)： 55/112頁
文件大?。?/td> 537K
代理商： SAA5667HL/NNNN
2004 Sep 03
47
Philips Semiconductors
Product specication
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA56xx
17 I2C-BUS SERIAL I/O
The I2C-bus consists of a serial data line (SDA) and a
serial clock line (SCL). The definition of the I2C-bus
protocol can be found in
“The I2C-bus and how to use it
(including specification). Philips Semiconductors”.
The device operates in four modes:
Master transmitter
Master receiver
Slave transmitter
Slave receiver.
The microcontroller peripheral is controlled by the Serial
Control SFR (S1CON) and its status is indicated by the
Status SFR (S1STA). Information is transmitted/received
to/from the I2C-bus using the Data SFR (S1DAT). The
Slave Address SFR (S1ADR) is used to configure the
slave address of the peripheral.
The byte level I2C-bus serial port is identical to the I2C-bus
serial port on the P8xC558, except for the clock rate
selection bits CR<2:0>. The operation of the subsystem is
described in detail in the
“P8xC558 data sheet”.
17.1
I2C-bus modes
Three different I2C-bus selection tables for CR<2:0> can
be configured using the ROMBK SFR (IIC_LUT<1:0>), as
shown in Table 16.
17.1.1
NOMINAL MODE (IIC_LUT<1:0> = 00)
This option accommodates the P8xC558 I2C-bus, refer to
“Handbook IC20, 80C51-Based 8-Bit Microcontrollers”.
The various serial rates are shown in Table 16:
Table 16 I2C-bus serial rates in ‘P8xC558 nominal mode’
17.1.2
FAST MODE (IIC_LUT<1:0> = 01)
This option accommodates the P8xC558 I2C-bus doubled
rates, as shown in Table 17.
Table 17 I2C-bus serial rates in ‘P8xC558 fast mode’
17.1.3
SLOW MODE’ (IIC_LUT<1:0> = 10)
This option accommodates the P8xC558 I2C-bus rates,
divided by 2, as shown in Table 18.
Table 18 I2C-bus serial rates ‘P8xC558 slow mode’
17.2
I2C-bus port selection
Two I2C-bus ports are available: SCL0/SDA0 and
SCL1/SDA1. The ports are selected by using TXT21.I2C
Port 0 and TXT21.I2C Port 1. When a port is enabled, any
information transmitted from the device goes onto the
enabled port. Information transmitted to the device can
only be acted on if the port is enabled.
If both ports are enabled, then data transmitted from the
device is seen on both ports. However, data transmitted to
the device on one port cannot be seen on the other port.
CR2
CR1
CR0
12 MHz
DIVISOR
I2C-BUS BIT
FREQUENCY (kHz)
0
60
200
0
1
1600
7.5
0
1
0
40
300
011
30
400
1
0
240
50
1
0
1
3200
3.75
1
0
160
75
111
120
100
CR2
CR1
CR0
12 MHz
DIVISOR
I2C-BUS BIT
FREQUENCY (kHz)
000
30
400
0
1
800
15
0
1
0
20
600
0
1
15
800
1
0
120
100
1
0
1
1600
7.5
1
0
80
150
1
60
200
CR2
CR1
CR0
12 MHz
DIVISOR
I2C-BUS BIT
FREQUENCY (kHz)
0
120
100
0
1
3200
3.75
0
1
0
80
150
0
1
60
200
1
0
480
25
1
0
1
6400
1.875
1
0
320
37.5
1
240
50
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