2004 Sep 03
54
Philips Semiconductors
Product specication
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA56xx
21.5
Page clearing
Page clearing is performed on request from the Data
Capture section or the microcontroller, under the control of
the embedded software.
At power-on and reset, the whole of the page memory is
cleared. Bit TXT13.PAGE CLEARING is set while this
takes place.
21.5.1
DATA CAPTURE PAGE CLEAR
When a page header is acquired for the first time after a
new page request or a page header is acquired with the
erase (C4) bit set, the page memory is ‘cleared’ to spaces
before the rest of the page arrives.
When this occurs, the space code (20H) is written into
every location of rows 1 to 23 of the basic page memory,
the appropriate packet 27 row of the extension packet
memory and the row where Teletext packet 24 is written.
This last row is either row 24 of the basic page memory (if
the TXT0.X24 POSN bit is set) or row 0 of the extension
packet memory (if the bit is not set).
Page clearing is done before the end of the TV line in
which the header arrived which initiated the page clear.
This means that the 1 field gap between the page header
and the rest of the page which is necessary for many
Teletext decoders is not required.
21.5.2
SOFTWARE PAGE CLEAR
The software can also initiate a page clear by setting bit
TXT9.CLEAR MEMORY. Now, every location in the
memory block pointed to by TXT15.BLOCK<3:0> is
cleared to a space code (20H). Bit CLEAR MEMORY is
not latched, so the software does not have to reset it after
it has been set.
Only one page can be cleared in a TV line. Therefore, if the
software requests a page clear, it will be carried out on the
next TV line on which the Data Capture hardware does not
force the page to be cleared. A flag (TXT13.PAGE
CLEARING) is provided to indicate that a software
requested page clear is being carried out. The flag is set
when a logic 1 is written to bit TXT9.CLEAR MEMORY
and is reset when the page clear has been completed.
All locations are cleared to 00H if bit TXT0.INV ON = 1 and
a page clear is initiated on Block 8.
21.6
Multi-page operations
When using SAA56xx in a multi-page application with
external SRAM, bit TXT28.MULTI PAGE should be set.
This allows the 80C51 microcontroller to copy acquired
data between internal Display memory and external SRAM
without hindrance.