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| 型號： | SC16C852SVIET |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1.8 V dual UART, 20 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface |
| 中文描述： | 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PBGA36 |
| 封裝： | 3.50 X 3.50 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, PLASTIC, SOT-912-1, TFBGA-36 |
| 文件頁數(shù)： | 16/48頁 |
| 文件大小： | 221K |
| 代理商： | SC16C852SVIET |
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SC16C852SV_1
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 23 September 2008
16 of 48
NXP Semiconductors
SC16C852SV
Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
6.11 Sleep mode
Sleep mode is an enhanced feature of the SC16C852SV UART. It is enabled when
EFR[4], the enhanced functions bit, is set
and
when IER[4] of both channels are set.
6.11.1
Conditions to enter Sleep mode
Sleep mode is entered when:
Modem input pins are not toggling.
The serial data input line, RXA/RXB, is idle for 4 character time (logic HIGH) and
AFCR1[4] is 0. When AFCR1[4] is 1, the device will go to sleep regardless of the state
of the RXA/RXB pin (see
Section 7.22
for the description of AFCR1 bit 4).
The TX FIFO and TX shift register are empty.
There are no interrupts pending.
The RX FIFO is empty.
In Sleep mode, the UART clock and baud rate clock are stopped. Since most registers are
clocked using these clocks, the power consumption is greatly reduced.
Remark:
Writing to the divisor latches, DLL and DLM, to set the baud clock, must not be
done during Sleep mode. Therefore, it is advisable to disable Sleep mode using IER[4]
before writing to DLL or DLM.
6.11.2
Conditions to resume normal operation
SC16C852SV resumes normal operation by any of the following:
Receives a start bit on RXA or RXB pin.
Data is loaded into transmit FIFO.
A change of state on any of the modem input pins.
If the device is awakened by one of the conditions described above, it will return to the
Sleep mode automatically after all the conditions described in
Section 6.11.1
are met. The
device will stay in Sleep mode until it is disabled by setting any channel’s IER bit 4 to a
logic 0.
When the SC16C852SV is in Sleep mode and the host interface bus (AD7 to AD0, IOW,
IOR, CS) remains in steady state, either HIGH or LOW, the sleep current will be in the
microampere range as specified in
Table 37 “Static characteristics”
. If any of these signals
is toggling or floating then the sleep current will be higher.
6.12 Low Power feature
A Low Power feature is provided by the SC16C852SV to prevent the switching of the host
data bus from influencing the sleep current. When the pin LOWPWR is activated (logic
HIGH), the device immediately and unconditionally goes into Low Power mode. All clocks
are stopped and most host interface pins are isolated to reduce power consumption. The
device only returns to normal mode when the LOWPWR pin is de-asserted. The pin can
be left unconnected because it has an internal pull-down resistor.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SC16C852SVIET,115 | 功能描述:UART 接口集成電路 UART 2-CH 128Byte FIFO 1.8V 36-Pin RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C852SVIET,151 | 功能描述:UART 接口集成電路 UART 2-CH 128Byte FIFO 1.8V 36-Pin RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C852SVIET,157 | 功能描述:UART 接口集成電路 UART 2-CH 128Byte FIFO 1.8V 36-Pin RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C852V | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface |
| SC16C852V_08 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V dual UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface |
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