參數(shù)資料
型號(hào): SC16C852SVIET
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 1.8 V dual UART, 20 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface
中文描述: 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PBGA36
封裝: 3.50 X 3.50 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, PLASTIC, SOT-912-1, TFBGA-36
文件頁數(shù): 38/48頁
文件大?。?/td> 221K
代理商: SC16C852SVIET
SC16C852SV_1
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 23 September 2008
38 of 48
NXP Semiconductors
SC16C852SV
Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
10. Dynamic characteristics
[1]
External clock only; maximum crystal frequency is 24 MHz.
[2]
10 % of the data bus fall or rise time.
[3]
RCLK is an internal frequency and it is equal to the sampling rate times the baud rate.
Table 38.
T
amb
=
40
°
C to +85
°
C; V
DD
= 1.65 V to 1.95 V; unless otherwise specified.
Symbol
Parameter
f
XTAL1
frequency on pin XTAL1
t
d(CS-LLA)
delay time from CS to LLA
t
su(A-LLAL)
set-up time from address to LLA LOW
t
w(LLA)
LLA pulse width time
t
h(LLAH-A)
address hold time after LLA HIGH
t
d(IOW)
IOW delay time
t
d(IOR-DV)
delay time from IOR to data valid
t
w(IOR)
IOR pulse width time
t
d(LLAH-IORL)
delay time from LLA HIGH to IOR LOW
t
w(IOW)
IOW pulse width time
t
h(IOWH-D)
data input hold time after IOW HIGH
t
d(LLAH-IOWL)
delay time from LLA HIGH to IOW LOW
t
su(D-IOWH)
set-up time from data input to IOW HIGH
t
d(IOR)
IOR delay time
t
dis(IOR-QZ)
disable time from IOR to high-impedance
data output
[2]
t
d(IOW-Q)
delay time from IOW to data output
t
d(modem-INT)
delay time from modem to INT
t
d(IOR-INTL)
delay time from IOR to INT LOW
t
WH
pulse width HIGH
t
WL
pulse width LOW
t
w(clk)
clock pulse width
t
d(stop-INT)
delay time from stop to INT
t
d(start-INT)
delay time from start to INT
t
d(IOW-TX)
delay time from IOW to TX
t
d(IOW-INTL)
delay time from IOW to INT LOW
t
w(RESET_N)
pulse width on pin RESET
Dynamic characteristics
Conditions
Min
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
80
-
-
-
-
-
40
-
-
-
-
-
-
-
20
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
[1]
-
10
5
10
10
10
-
28
10
10
5
10
5
10
-
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
-
-
-
6
6
12.5
-
-
-
-
-
-
-
-
-
-
-
50
50
50
-
-
-
1T
RCLK
1T
RCLK
24T
RCLK
50
-
ns
ns
ns
ns
ns
ns
s
s
s
ns
ns
25 pF load
25 pF load
[3]
-
-
[3]
8T
RCLK
-
10
25 pF load
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SC16C852SVIET,151 功能描述:UART 接口集成電路 UART 2-CH 128Byte FIFO 1.8V 36-Pin RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C852SVIET,157 功能描述:UART 接口集成電路 UART 2-CH 128Byte FIFO 1.8V 36-Pin RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C852V 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
SC16C852V_08 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V dual UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface