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| 型號(hào)： | SC16C852SVIET |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1.8 V dual UART, 20 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface |
| 中文描述： | 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PBGA36 |
| 封裝： | 3.50 X 3.50 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, PLASTIC, SOT-912-1, TFBGA-36 |
| 文件頁(yè)數(shù)： | 8/48頁(yè) |
| 文件大小： | 221K |
| 代理商： | SC16C852SVIET |
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SC16C852SV_1
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 23 September 2008
8 of 48
NXP Semiconductors
SC16C852SV
Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
6.2 Extended mode (128-byte FIFO)
The device is in the extended mode when any of these four registers contains any value
other than 0: FLWCNTH, FLWCNTL, TXINTLVL, RXINTLVL.
6.3 Internal registers
The SC16C852SV provides two sets of internal registers (A and B) consisting of
25 registers each for monitoring and controlling the functions of each channel of the
UART. These registers are shown in
Table 4
.
Table 4.
A3
General register set (THR/RHR, IER/ISR, MCR/MSR, FCR, LSR, SPR)
[1]
0
0
0
Receive Holding Register
0
0
1
Interrupt Enable Register
0
1
0
Interrupt Status Register
0
1
1
Line Control Register
1
0
0
Modem Control Register
1
0
1
Line Status Register
1
1
0
Modem Status Register
1
1
1
Scratchpad Register
Baud rate register set (DLL/DLM)
[2]
0
0
0
LSB of Divisor Latch
0
0
1
MSB of Divisor Latch
Second special register set (TXLVLCNT/RXLVLCNT)
[3]
0
1
1
Transmit FIFO Level Count
1
0
0
Receive FIFO Level Count
Enhanced register set (EFR, Xon1/Xon2, Xoff1/Xoff2)
[4]
0
1
0
Enhanced Feature Register
1
0
0
Xon1 word
1
0
1
Xon2 word
1
1
0
Xoff1 word
1
1
1
Xoff2 word
First extra feature register set (TXINTLVL/RXINTLVL, FLWCNTH/FLWCNTL)
[5]
0
1
0
Transmit FIFO Interrupt Level
1
0
0
Receive FIFO Interrupt Level
1
1
0
Flow Control Count High
1
1
1
Flow Control Count Low
Second extra feature register set (CLKPRES, SAMPR, RS485TIME, AFCR2, AFCR1)
[6]
0
1
0
Clock Prescaler
0
1
1
Sampling rate
1
0
0
RS-485 turn-around Timer
1
1
0
Additional Feature Control Register 2
1
1
1
Additional Feature Control Register 1
Internal registers decoding
A1
Read mode
A2
Write mode
Transmit Holding Register
Interrupt Enable Register
FIFO Control Register
Line Control Register
Modem Control Register
Extra Feature Control Register (EFCR)
n/a
Scratchpad Register
LSB of Divisor Latch
MSB of Divisor Latch
n/a
n/a
Enhanced Feature Register
Xon1 word
Xon2 word
Xoff1 word
Xoff2 word
Transmit FIFO Interrupt Level
Receive FIFO Interrupt Level
Flow Control Count High
Flow Control Count Low
Clock Prescaler
Sampling rate
RS-485 turn-around Timer
Additional Feature Control Register 2
Additional Feature Control Register 1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SC16C852SVIET,115 | 功能描述:UART 接口集成電路 UART 2-CH 128Byte FIFO 1.8V 36-Pin RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C852SVIET,151 | 功能描述:UART 接口集成電路 UART 2-CH 128Byte FIFO 1.8V 36-Pin RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C852SVIET,157 | 功能描述:UART 接口集成電路 UART 2-CH 128Byte FIFO 1.8V 36-Pin RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C852V | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface |
| SC16C852V_08 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V dual UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface |
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