參數(shù)資料
型號(hào): SC16C852SVIET
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 1.8 V dual UART, 20 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface
中文描述: 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PBGA36
封裝: 3.50 X 3.50 MM, 0.80 MM HEIGHT, ROHS COMPLIANT, PLASTIC, SOT-912-1, TFBGA-36
文件頁數(shù): 34/48頁
文件大?。?/td> 221K
代理商: SC16C852SVIET
SC16C852SV_1
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 23 September 2008
34 of 48
NXP Semiconductors
SC16C852SV
Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
7.20 Sampling Rate (SAMPR)
Bit 1 and bit 0 of this register program the device’s sampling rate.
7.21 RS-485 turn-around time delay (RS485TIME)
The value in this register controls the turn-around time of the external line transceiver in
bit time. In automatic 9-bit mode, the RTSA/RTSB or DTRA/DTRB pin is used to control
the direction of the line driver, after the last bit of data has been shifted out of the transmit
shift register the UART will count down the value in this register. When the count value
reaches zero, the UART will assert the RTSA/RTSB or DTRA/DTRB pin (logic 0) to turn
the external RS-485 transceiver around for receiving.
7.22 Advanced Feature Control Register 1 (AFCR1)
Table 30.
Bit
7:2
1:0
Sampling rate
Symbol
SAMPR[7:2]
SAMPR[1:0]
Description
reserved
sampling rate
00 = 16
×
01 = 8
×
10 = 4
×
11 = reserved
Table 31.
Bit
7:0
RS-485 programmable turn-around time register
Symbol
Description
RS485TIME[7:0]
External RS-485 transceiver turn-around time delay. The value
represents the bit time at the programmed baud rate.
Table 32.
Bit
7
Advanced Feature Control Register 1 bits description
Symbol
Description
AFCR1[7]
Concurrent write. When this bit is set the host can write concurrently to the
same register of all channels.
0 = normal operation
1 = concurrent write operation
AFCR1[6:5]
reserved
AFCR1[4]
Sleep RXlow. Program RX input to be edge-sensitive or level-sensitive.
0 = RX input is level sensitive. If RXA/RXB pin is LOW, the UART will not
go to sleep. Once the UART is in Sleep mode, it will wake up if RXA/RXB
pin goes LOW.
1 = RX input is edge sensitive. UART will go to sleep even if RXA/RXB
pin is LOW, and will wake up when RXA/RXB pin toggles.
AFCR1[3]
reserved
AFCR1[2]
RTS/CTS mapped to DTR/DSR. Switch the function of RTS/CTS to
DTR/DSR.
0 = RTS and CTS signals are used for hardware flow control
1 = DTR and DSR signals are used for hardware flow control. RTS and
CTS retain their functionality.
6:5
4
3
2
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SC16C852V 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
SC16C852V_08 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V dual UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface