Table 1. Absolute Maximum Ratings an" />
參數(shù)資料
型號： SI3232DC0-EVB
廠商： Silicon Laboratories Inc
文件頁數(shù)： 63/128頁
文件大小： 0K
描述： DAUGHTER CARD W/SI3200 INTERFACE
標準包裝： 1
系列： ProSLIC®
主要目的： 接口，模擬前端（AFE）
已用 IC / 零件： Si3232
已供物品： 板，CD
Si3232
4
Preliminary Rev. 0.96
Not
Recommended
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1. Electrical Specifications
Table 1. Absolute Maximum Ratings and Thermal Information1
Parameter
Symbol
Test Condition
Value
Unit
Supply Voltage, Si3200 and Si3232
VDD, VDD1–VDD4
–0.5 to 6.0
V
High Battery Supply Voltage2
VBATH
Continuous
0.4 to –104
V
10 ms
0.4 to –109
Low Battery Supply Voltage, Si32002
VBAT, VBATL
Continuous
VBATH
V
TIP or RING Voltage, Si3200
VTIP, VRING
Continuous
Pulse < 10
s
Pulse < 4
s
–104
VBATH –15
VBATH –35
V
TIP, RING Current, Si3200
ITIP, IRING
±100
mA
STIPAC, STIPDC, SRINGAC, SRI-
NGDC Current, Si3232
±20
mA
Input Current, Digital Input Pins
IIN
Continuous
±10
mA
Digital Input Voltage
VIND
–0.3 to (VDD + 0.3)
V
Operating Temperature Range
TA
–40 to 100
°C
Storage Temperature Range
TSTG
–40 to 150
°C
Si3232 Thermal Resistance, Typical3
(TQFP-64 ePad)
JA
25
°C/W
Si3200 Thermal Resistance, Typical3
(SOIC-16 ePad)
JA
55
°C/W
Continuous Power Dissipation,
Si32004
PD
TA = 85 °C, SOIC-16
1
W
Continuous Power Dissipation,
Si3232
PD
TA = 85 °C, TQFP-64
1.6
W
Notes:
1. Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. The dv/dt of the voltage applied to the VBAT, VBATH, and VBATL pins must be limited to 10 V/s.
3. The thermal resistance of an exposed pad package is assured when the recommended PCB layout guidelines are
followed correctly. The specified performance requires that the exposed pad be soldered to an exposed copper surface
of equal size and that multiple vias are added to enable heat transfer between the top-side copper surface and a large
internal copper ground plane. Refer to “AN55: Dual ProSLIC User Guide” or to the Si3232 evaluation board data
sheet for specific layout examples.
4. On-chip thermal limiting circuitry will shut down the circuit at a junction temperature of approximately 150 °C. For
optimal reliability, operation above 140 °C junction temperature should be avoided.
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