- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16215 > SI3232DCX-EVB (Silicon Laboratories Inc)DAUGHTER CARD W/DISCRETE INTRFC PDF資料下載
參數(shù)資料
| 型號(hào)： | SI3232DCX-EVB |
| 廠商： | Silicon Laboratories Inc |
| 文件頁(yè)數(shù)： | 40/128頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | DAUGHTER CARD W/DISCRETE INTRFC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ProSLIC® |
| 主要目的： | 接口，模擬前端（AFE） |
| 已用 IC / 零件： | Si3232 |
| 已供物品： | 板，CD |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)當(dāng)前第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)
Si3232
Preliminary Rev. 0.96
19
Not
Recommended
fo
r N
ew
D
esi
gn
4. Functional Description
The Si3232 dual SLIC is a low-voltage CMOS device
that provides a fully-programmable SLIC with line
monitoring and test functions to create a dual-channel
analog
telephone
interface.
Intended
for
multiple
channel
applications,
the
Si3232
provides
high
integration and low-power operation for applications,
such as integrated access devices (IADs), voice-over
DSL systems, cable telephony systems, and voice-over
IP systems. These devices meet all relevant Bellcore
LSSGR, ITU, and ETSI standards.
The Si3232 performs the battery, overvoltage, ringing,
supervision, hybrid, and test functions on-chip in a low-
power,
small-footprint
solution.
All
high-voltage
functions are implemented using the Si3200 linefeed
interface IC allowing a highly-integrated solution that
offers the lowest total system cost.
The internal linefeed circuitry provides programmable
on-hook voltage and off-hook loop current, reverse
battery operation, loop or ground start operation, and
on-hook transmission. Loop current and voltage are
continuously
monitored
using
an
integrated
8-bit
monitor A/D converter. The Si3232 provides on-chip,
balanced,
5 REN
ringing
with
or
without
a
programmable dc offset eliminating the need for an
external bulk ring generator and per-channel ringing
relay typically used in unbalanced ringing applications.
Both sinusoidal and trapezoidal ringing waveshapes are
available. Ringing parameters, such as frequency,
waveshape, cadence, and offset, can be programmed
into registers to reduce external controller requirements.
All ringing options are software-programmable over a
wide range of parameters to address a wide variety of
application requirements.
The Si3232 also provides a variety of line monitoring
and subscriber loop testing. It has the ability to
continuously monitor and store all line voltage and
current parameters for fault detection, and all values are
available in registers for later use. In addition, the
Si3232
provides
line
card
and
subscriber
loop
diagnostic functions to eliminate the need for system-
level test equipment. These test and diagnostic
functions are intended to comply with relevant LSSGR
and ITU requirements for line-fault detection and
reporting, and all measured values are stored in
registers for later use or further calculations.
The Si3232 is software-programmable allowing a single
hardware design to meet international requirements.
Programmability is supported using a standard 4-wire
serial peripheral interface (SPI). The Si3232 is available
in a 64-lead thin quad flat package (TQFP), and the
Si3200 is available in a thermally-enhanced 16-lead
SOIC.
4.1. Linefeed Architecture
The Si3232 is a low-voltage CMOS device that uses a
low-cost integrated linefeed interface IC to control the
high voltages required for subscriber line interfaces.
Figure 6 is a simplified single-ended model of the
linefeed control loop circuit for both the TIP and RING
leads.
The Si3232 uses both voltage and current sensing to
control TIP and RING. DC line voltages on TIP and
RING are measured through sense resistors RDC. AC
line voltages on TIP and RING are measured through
sense resistors RAC. The Si3232 uses the Si3200
linefeed interface to drive TIP and RING.
The Si3232 measures voltage at various nodes to
monitor the linefeed current. RDC and RBAT provide
access to these measuring points. The sense circuitry is
calibrated on-chip to guarantee measurement accuracy.
See "4.4. Linefeed Calibration" on page 25 for details on
linefeed calibration.
4.2. Power Supply Transients on the
Si3200
The Si3200 features an ESD clamp protection circuit
connected between the VDD and VBATH rails. This
clamp protects the Si3200 against ESD damage when
the device is being handled out-of-circuit during
manufacture. Precautions must be taken in the VDD and
VBATH system power supply design. At power-up, the
VDD and VBATH rails must ramp-up from 0 V to their
respective target values in a linear fashion and must not
exhibit fast transients or oscillations which could cause
the ESD clamp to be activated for an extended period of
time resulting in damage to the Si3200. The resistors
shown as R20 through R23 together with capacitors
C23, C24, C30 and C31 in the Application Schematic
on page 17) provide some measure of
protection against in-circuit ESD clamp activation by
forming a filter time constant and by providing current
limitting action in case of momentary clamp activation
during power-up. These resistors and capacitors must
be included in the application circuit, while ensuring that
the VDD and VBATH system power supplies are
designed to exhibit start-up behavior that is free of
undesirable transients or oscillations. Once the VDD and
VBATH are in their steady state final values, the ESD
clamp has circuitry that prevents it from being activated
by transients slower than 10 V/us. In the steady
powered-up state, the VDD and VBATH rails must
therefore not exhibit transients resulting in a voltage
slew rate greater than 10 V/s.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M1AXK-3440K | IDC CABLE - MSC34K/MC34F/X |
| SI3232PPT0-EVB | BOARD EVAL W/SI3200 INTERFACE |
| UPZW6101MHD | CAP ALUM 100UF 420V 20% RADIAL |
| SI3232DC0-EVB | DAUGHTER CARD W/SI3200 INTERFACE |
| UPZ2D391MHD | CAP ALUM 390UF 200V 20% RADIAL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI3232-FQ | 功能描述:電信線路管理 IC DUAL CH SLIC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| SI3232-FQR | 制造商:Silicon Laboratories Inc 功能描述: |
| SI3232-G-FQ | 功能描述:電信線路管理 IC Dual-Channel SLIC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| SI3232-G-FQR | 功能描述:電信線路管理 IC Dual-CH SLIC only Internal 65 Vrms RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| SI3232-G-GQ | 功能描述:電信線路管理 IC Dual-Channel SLIC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。