PSLEEP
參數(shù)資料
型號(hào): SI3232DCX-EVB
廠商: Silicon Laboratories Inc
文件頁數(shù): 96/128頁
文件大?。?/td> 0K
描述: DAUGHTER CARD W/DISCRETE INTRFC
標(biāo)準(zhǔn)包裝: 1
系列: ProSLIC®
主要目的: 接口,模擬前端(AFE)
已用 IC / 零件: Si3232
已供物品: 板,CD
Si3232
Preliminary Rev. 0.96
7
Not
Recommended
fo
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ew
D
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Power Consumption
PSLEEP
Sleep mode, RESET = 0, VBAT =–70 V
8
mW
POPEN
Open (high impedance), VBAT = –70 V
65
mW
PSTBY
Active on-hook standby, VBAT = –48 V
70
mW
PSTBY
Active on-hook standby, VBAT = –70 V
80
mW
PACTIVE
Forward/reverse active off-hook,
ABIAS = 4 mA, VBAT =–24 V
—175
mW
PACTIVE
Forward/reverse active off-hook,
ABIAS = 4 mA, VBAT =–48 V
—280
mW
POHT
Forward/reverse OHT, OBIAS = 4 mA,
VBAT =–48 V
—500
mW
POHT
Forward/reverse OHT, OBIAS = 4 mA,
VBAT =–70 V
—685
mW
PRING
Ringing, VRING =45Vrms,
VBAT = –70 V, Sine Wave, 1 REN load
—516
mW
Table 3. Power Supply Characteristics1 (Continued)
(VDD, VDD1–VDD4 = 3.3 V, TA = 0 to 70 °C for K-Grade, –40 to 85 °C for B-Grade)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Notes:
1. All specifications are for a single channel based on measurements with both channels in the same operating state.
2. See “4.7.4. Ringing Power Considerations” for current and power consumption under other operating conditions.
3. Power consumption does not include additional power required for dc loop feed. Total system power consumption must
include an additional VBAT x ILIM term.
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