- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16215 > SI3232DCX-EVB (Silicon Laboratories Inc)DAUGHTER CARD W/DISCRETE INTRFC PDF資料下載
參數(shù)資料
| 型號： | SI3232DCX-EVB |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 82/128頁 |
| 文件大?。?/td> | 0K |
| 描述： | DAUGHTER CARD W/DISCRETE INTRFC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ProSLIC® |
| 主要目的： | 接口，模擬前端（AFE） |
| 已用 IC / 零件： | Si3232 |
| 已供物品： | 板，CD |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁當(dāng)前第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁
Si3232
Preliminary Rev. 0.96
57
Not
Recommended
fo
r N
ew
D
esi
gn
s
During
RAM
address
accesses,
CONTROL,
ADDRESS, and DATA are captured in the SPI module.
At the completion of the ADDRESS byte of a READ
access, the contents of the channel-based data buffer
are moved into the data register in the SPI for shifting
out during the DATA portion of the SPI transfer. This is
the data loaded into the data buffer in response to the
previous RAM address read request. Therefore, there is
a one-deep pipeline nature to RAM address READ
operations. At the completion of the DATA portion of the
READ cycle, the ADDRESS is transferred to the
channel-based address buffer, and a RAM access
request is logged for that channel. The RAMSTAT bit in
each channel can be polled to monitor the status of
RAM address accesses that are serviced twice per
sample period at dedicated windows in the DSP
algorithm.
There is also a RAM access interrupt in each channel
which, when enabled, indicates that the pending RAM
access request has been serviced. For a RAM WRITE
access, the ADDRESS and DATA is transferred from
the SPI registers to the address and data buffers in the
appropriate channel. The RAM WRITE request is then
logged. As for READ operations, the status of the
pending request can be monitored by either polling the
RAMSTAT bit for the channel or enabling the RAM
access interrupt for the channel. By keeping the
address and data buffers as well as the RAMSTAT
register on a per-channel basis, RAM address accesses
can be scheduled for both channels without interface.
4.18. System Testing
The Si3232 includes a complete suite of test tools that
provide the user with the ability to test the functionality
of the line card as well as detect fault conditions present
on the TIP/RING pair. Using the included loopback test
mode
along
with
the
signal
generation
and
measurement tools, the user can typically eliminate the
need for per-line test relays as well as centralized test
equipment.
4.18.1. Loopback Test Mode
The codec loopback encompasses almost entirely the
electronics of both the transmit and receive paths. The
analog signal at the output of the system receive path
DAC is fed back to the input of the transmit path by way
of a feedback path. (See Figure 37.) The codec
loopback mode is enabled by setting the DLM bit in the
LBCON register. The impedance synthesis is disabled
in this mode.
4.18.2. Line Test and Diagnostics
The Si3232 provides a variety of diagnostics tools that
facilitate
remote
fault
detection
and
parametric
diagnostics on the TIP/RING pair as well as line card
functionality verification. The Si3232 can generate dc
line currents and voltages as well as measure all
resulting line voltage and current levels on TIP, RING, or
across the TIP/RING pair. When used in conjunction
with an external codec that can generate discrete audio
tones and discriminate certain audio frequency bands,
the Si3232 can provide a vehicle to allow remote
diagnostics on the subscriber loop and the line card. All
parameters measured by the Si3232 are stored in
registers for further processing by the codec and DSP,
and all dc generation tools are register-programmable
to allow a software-configurable remote diagnostic
system.
The Si3232’s signal generation and measurement tools
are summarized in Table 32. The accompanying text
describes the methodology that can be used to develop
a fully-programmable test suite to facilitate remote
diagnostics.
Figure 37. Digital Loopback Mode
TIP/
RING
+
ATX
I
BUF
Z
A
Codec
Loopback
To off-chip
ADC
Mute
+
Mute
G
m
ARX
From
off-chip
ADC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M1AXK-3440K | IDC CABLE - MSC34K/MC34F/X |
| SI3232PPT0-EVB | BOARD EVAL W/SI3200 INTERFACE |
| UPZW6101MHD | CAP ALUM 100UF 420V 20% RADIAL |
| SI3232DC0-EVB | DAUGHTER CARD W/SI3200 INTERFACE |
| UPZ2D391MHD | CAP ALUM 390UF 200V 20% RADIAL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI3232-FQ | 功能描述:電信線路管理 IC DUAL CH SLIC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| SI3232-FQR | 制造商:Silicon Laboratories Inc 功能描述: |
| SI3232-G-FQ | 功能描述:電信線路管理 IC Dual-Channel SLIC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| SI3232-G-FQR | 功能描述:電信線路管理 IC Dual-CH SLIC only Internal 65 Vrms RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| SI3232-G-GQ | 功能描述:電信線路管理 IC Dual-Channel SLIC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。