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參數(shù)資料
型號(hào): SI4126M-EVB
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 33/34頁(yè)
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR SI4126
標(biāo)準(zhǔn)包裝: 1
類型: 合成器
適用于相關(guān)產(chǎn)品: SI4126
已供物品: 板,CD
其它名稱: 336-1112
Si4136/Si4126
8
Rev. 1.41
Table 5. RF and IF Synthesizer Characteristics
(VDD = 2.7 to 3.6 V, TA = –40 to 85 °C)
Parameter1
Symbol
Test Condition
Min
Typ
Max
Unit
XIN Input Frequency
f
REF
XINDIV2 = 0
2
25
MHz
XIN Input Frequency
fREF
XINDIV2 = 1
25
50
MHz
Reference Amplifier Sensitivity
VREF
0.5
VDD
+0.3 V
VPP
Phase Detector Update Frequency
f
f= fREF/R for
XINDIV2 = 0
f= fREF/2R for
XINDIV2 = 1
0.010
1.0
MHz
RF1 VCO Tuning Range2
2300
2500
MHz
RF2 VCO Tuning Range2
2025
2300
MHz
IF VCO Center Frequency Range
fCEN
526
952
MHz
IFOUT Tuning Range from fCEN
with IFDIV
62.5
1000
MHz
IFOUT VCO Tuning Range from fCEN
Note: L ±10%
–5
5
%
RF1 VCO Pushing
Open loop
0.75
MHz/V
RF2 VCO Pushing
0.65
MHz/V
IF VCO Pushing
0.10
MHz/V
RF1 VCO Pulling
VSWR = 2:1, all
phases, open loop
0.250
MHz p-p
RF2 VCO Pulling
0.100
MHz p-p
IF VCO Pulling
0.025
MHz p-p
RF1 Phase Noise
1 MHz offset
–130
dBc/Hz
RF1 Integrated Phase Error
100 Hz to 100 kHz
1.2
degrees
rms
RF2 Phase Noise
1 MHz offset
–131
dBc/Hz
RF2 Integrated Phase Error
100 Hz to 100 kHz
1.0
degrees
rms
IF Phase Noise at 800 MHz
100 kHz offset
–104
dBc/Hz
IF Integrated Phase Error
100 Hz to 100 kHz
0.4
degrees
rms
Notes:
1. f(RF) = 1 MHz, f(IF) = 1 MHz, RF1 = 2.4 GHz, RF2 = 2.1 GHz, IFOUT = 800 MHz, LPWR = 0, for all parameters
unless otherwise noted.
2. RF VCO tuning range limits are fixed by inductance of internally bonded wires.
3. From powerup request (PWDN
or SEN during a write of 1 to bits PDIB and PDRB in Register 2) to RF and IF
synthesizers ready (settled to within 0.1 ppm frequency error).
4. From powerdown request (PWDN
, or SENduring a write of 0 to bits PDIB and PDRB in Register 2) to supply current
equal to IPWDN.
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