參數(shù)資料
型號: SI4126M-EVB
廠商: Silicon Laboratories Inc
文件頁數(shù): 34/34頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR SI4126
標(biāo)準(zhǔn)包裝: 1
類型: 合成器
適用于相關(guān)產(chǎn)品: SI4126
已供物品: 板,CD
其它名稱: 336-1112
Si4136/Si4126
Rev. 1.41
9
RF1 Harmonic Suppression
Second Harmonic
–28
–20
dBc
RF2 Harmonic Suppression
–23
–20
dBc
IF Harmonic Suppression
–26
–20
dBc
RFOUT Power Level
ZL = 50RF1 active
–7
–3.5
–0.5
dBm
RFOUT Power Level
ZL = 50RF2 active
–7
–3.5
–0.5
dBm
IFOUT Power Level
ZL = 50
–7
–4
0
dBm
RF1 Output Reference Spurs
Offset = 1 MHz
–63
dBc
Offset = 2 MHz
–68
dBc
Offset = 3 MHz
–70
dBc
RF2 Output Reference Spurs
Offset = 1 MHz
–63
dBc
Offset = 2 MHz
–68
dBc
Offset = 3 MHz
–70
dBc
Powerup Request to Synthesizer Ready3
Time
tpup
Figures 4, 5
f> 500 kHz
80
100
s
Powerup Request to Synthesizer Ready3
Time
t
pup
Figures 4, 5
f 500 kHz
—40/f
50/f
Powerdown Request to Synthesizer Off4
Time
tpdn
Figures 4, 5
100
ns
Table 5. RF and IF Synthesizer Characteristics (Continued)
(VDD = 2.7 to 3.6 V, TA = –40 to 85 °C)
Parameter1
Symbol
Test Condition
Min
Typ
Max
Unit
Notes:
1. f(RF) = 1 MHz, f(IF) = 1 MHz, RF1 = 2.4 GHz, RF2 = 2.1 GHz, IFOUT = 800 MHz, LPWR = 0, for all parameters
unless otherwise noted.
2. RF VCO tuning range limits are fixed by inductance of internally bonded wires.
3. From powerup request (PWDN
or SEN during a write of 1 to bits PDIB and PDRB in Register 2) to RF and IF
synthesizers ready (settled to within 0.1 ppm frequency error).
4. From powerdown request (PWDN
, or SENduring a write of 0 to bits PDIB and PDRB in Register 2) to supply current
equal to IPWDN.
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