參數(shù)資料
型號: SLB128B
廠商: National Semiconductor Corporation
英文描述: Transmitter with built-in scaler for LVDS Display Interface (LDI)
中文描述: 發(fā)射器內(nèi)置的LVDS顯示接口(低密度脂蛋白縮放)
文件頁數(shù): 18/48頁
文件大小: 650K
代理商: SLB128B
Host Control Register Descriptions
(Continued)
Bit
7:0
Description
Vendor ID Low Byte
Register Name: VND_IDH
Address Offset: 01h
Default Value:
Access Method: Read Only
13h
Bit
7:0
Description
Vendor ID High Byte
Register Name: DEV_IDL
Address Offset: 02h
Default Value:
Access Method: Read Only
26h
Bit
7:0
Description
Device ID Low Byte
Register Name: DEV_IDH
Address Offset: 03h
Default Value:
Access Method: R/W
67h
Bit
7:0
Description
Device ID High Byte
Register Name: DEVICE REVISION
Address Offset: 04h
Default Value:
01h
Access Method: R/W
Bit
7:0
Description
Device Revision Value
Register Name: RESERVED
Address Offset: 05h
Default Value:
Access Method: Read Only
A5h
Bit
7:0
Description
Reserved
Register Name: FRQ_LOW
Address Offset: 06h
Default Value:
Access Method: Read Only
19h
Bit
7:0
Description
Minimum LVDS Output Frequency (25 MHz)
Register Name: FRQ_HIGH
Address Offset: 07h
Default Value:
Access Method: Read Only
See Description
Bit
7:0
Description
Maximum LVDS Output Frequency
If DUAL = GND or V
CC
value is A2h (162 MHz)
If DUAL =
1
2
V
CC
value is 55h (85 MHz)
D
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