參數(shù)資料
型號(hào): SLB128B
廠商: National Semiconductor Corporation
英文描述: Transmitter with built-in scaler for LVDS Display Interface (LDI)
中文描述: 發(fā)射器內(nèi)置的LVDS顯示接口(低密度脂蛋白縮放)
文件頁(yè)數(shù): 41/48頁(yè)
文件大?。?/td> 650K
代理商: SLB128B
Applications Information
How to configure the DS90C2501 with DS90C364 or
DS90CF364A or DS90CF366 for most common applica-
tion:
1. To configure for single pixel in to single pixel out applica-
tion
using
the
DS90C2501
DS90CF364A or DS90CF366, the “DUAL” pin must be set to
Gnd (single). In this mode, outputs A0-to-A3 and CLK1 are
enabled, and outputsA4-to-A7 and CLK2 are disabled which
reduces power dissipation.
with
DS90CF364
or
Features Description:
2. Programmable Primary Edge E1:
The transmitter is
latching data on both the rising and falling edges of clock
signal coming in on CLKINP pin. The EDGE pin can be used
to program to select the rising edge of CLKINP as the
primary edge E1 or to have the falling edge of CLKINP as the
primary edge E1. However, the logic state of the EDGE pin
must agree with the GUI to generate the correct display.
TABLE 10. Connection for SISO Operation
From DS90C2501
To GMCH
RGB data signal connection
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
DVOxDATA0
DVOxDATA1
DVOxDATA2
DVOxDATA3
DVOxDATA4
DVOxDATA5
DVOxDATA6
DVOxDATA7
DVOxDATA8
DVOxDATA9
DVOxDATA10
DVOxDATA11
GND
DVOxCLKOUT1
DVOxCLKOUT0
DVOxBLANK
DVOxHSYNC
DVOxVYSNC
D12 to D23
CLKINP
CLKINM
DE
HSYNC
VSYNC
connection for other pins
DUAL
EDGE
BAL
A0
A1
A2
ID0
ID1
ID2
ID3
RES1
RES2
RES3
RES4
TST1
TST2
TST3
S2Cclk
S2Cdat
REFCLK
COLOR
GND
GND
GND
Pull Up/Pull Down, Based on Device Address
Pull Up/Pull Down, Based on Device Address
Pull Up/Pull Down, Based on Device Address
Pull Up/Pull Down, Based on Panel ID
Pull Up/Pull Down, Based on Panel ID
Pull Up/Pull Down, Based on Panel ID
Pull Up/Pull Down, Based on Panel ID
GND
GND
GND
GND
GND
GND
GND
I2CCLK
I2CDATA
3V 14.31818MHz
GND
D
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