參數(shù)資料
型號: SLB128B
廠商: National Semiconductor Corporation
英文描述: Transmitter with built-in scaler for LVDS Display Interface (LDI)
中文描述: 發(fā)射器內(nèi)置的LVDS顯示接口(低密度脂蛋白縮放)
文件頁數(shù): 32/48頁
文件大?。?/td> 650K
代理商: SLB128B
LVDS Interface
(Continued)
Note 12:
The lower half of the pixel is latched by the primary clock edge E1.
Note 13:
E3 and E4 only apply when DUAL pin = 1/2 V
CC
.
Note 14:
Above figure only valid when R_FDE bit = V
CC
, DE signal from GUI is set to be active HIGH.
Note 15:
D0 to D11 are clocked at the crossing point of CLKOUT+ and CLKOUT when differential clock input is applied. This applies to D12 to D23 when DUAL
pin = V
CC
.
Note 16:
Single-ended clock is not recommended for operation above 65MHz by GMCH vendor.
TABLE 9. 12-bit (two data per clock) input application data mapping with GMCH.
P0
P1
P2
P0L
Low
G0[3]
G0[2]
G0[1]
G0[0]
B0[7]
B0[6]
B0[5]
B0[4]
B0[3]
B0[2]
B0[1]
B0[0]
P0H
High
R0[7]
R0[6]
R0[5]
R0[4]
R0[3]
R0[2]
R0[1]
R0[0]
G0[7]
G0[6]
G0[5]
G0[4]
P1L
Low
G1[3]
G1[2]
G1[1]
G1[0]
B1[7]
B1[6]
B1[5]
B1[4]
B1[3]
B1[2]
B1[1]
B1[0]
P1H
High
R1[7]
R1[6]
R1[5]
R1[4]
R1[3]
R1[2]
R1[1]
R1[0]
G1[7]
G1[6]
G1[5]
G1[4]
P2L
Low
G2[3]
G2[2]
G2[1]
G2[0]
B2[7]
B2[6]
B2[5]
B2[4]
B2[3]
B2[2]
B2[1]
B2[0]
P2H
High
R2[7]
R2[6]
R2[5]
R2[4]
R2[3]
R2[2]
R2[1]
R2[0]
G2[7]
G2[6]
G2[5]
G2[4]
Pin Name
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Note 17:
Color notation: R = RED, G = GREEN, B = BLUE.
Note 18:
Bit significance within a color: [7:0] = [MSB:LSB].
20004533
FIGURE 14. How Data is Latched in the DS90C2501
D
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